Hi @ykrons,
Thanks for sharing the links with us. As this may also help other people, I’m writing it back on the main thread.
Even though the pin is properly configured on the device tree to be a PU with the 0x20 set (see the following screenshot from NXP Reference Manual - 0x20 = 0100000b), there are some level shifters on the SoM level that make it behave differently than other pins like SODIMM133 that really do behave as PU like expected. These level shifters seem to be causing SODIMM144 to behave as a latch and are needed to regulate the voltage values on the module.
Therefore, we’d like to know if you’d really need to have this specific pin as PU or if you could work with it as it’s today or if you could use another GPIO. What would be the most suitable option for you? If it is to really use this specific pin as PU we’d need to look for an HW workaround and we may need some time to present you with a proper solution.
What do you think?
Best regards,