Using Alternate Pins for SPI3 - IMX7D

Hi, for my custom carrier board, I have been trying to modify the device tree to make the SPI3 bus use SODIMM pins 196, 55, and 63 for MISO, MOSI, and SCLK respectively, instead of the default pins (85, 59, 67). I have added the following to my custom dts file which my TorizonCoreBuilder config file points to:

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>;

	pinctrl_ecspi: ecspi3grp {
		fsl,pins = <
			MX7D_PAD_ENET1_RGMII_TD2__ECSPI2_MISO     0x2 /* SODIMM 196 */
			MX7D_PAD_ENET1_RGMII_RD3__ECSPI2_MOSI     0x2 /* SODIMM 55 */
			MX7D_PAD_ENET1_RGMII_RD2__ECSPI2_SCLK	  0x2 /* SODIMM 63 */
		>;
	};
};

/* Colibri SSP */
&ecspi3 {
	status = "okay";

	cs-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>; /* SODIMM 194 */
	pinctrl-0 = <&pinctrl_ecspi3>;

	/* &gpio2  3 GPIO_ACTIVE_HIGH SODIMM 117 OLED Data/Command  */

    spidev@0 {
		/* Use compatible "rohm,dh2228fv" to bind spidev driver */
		compatible = "rohm,dh2228fv";
		reg = <0>;
		spi-max-frequency = <10000000>;
	};
};

After uploading the resulting image to my Toradex, I ran the cat /sys/kernel/debug/pinctrl/pinctrl-handles command (from this article) and I can see this in the output:

device: 30840000.spi current state: default
  state: default
    type: MUX_GROUP controller 30330000.pinctrl group: ecspi3grp (3) function: pinctrl (0)
    type: CONFIGS_PIN controller 30330000.pinctrl pin MX7D_PAD_ENET1_RGMII_TD2 (147)config 00000002
    type: CONFIGS_PIN controller 30330000.pinctrl pin MX7D_PAD_ENET1_RGMII_RD3 (142)config 00000002
    type: CONFIGS_PIN controller 30330000.pinctrl pin MX7D_PAD_ENET1_RGMII_RD2 (141)config 00000002

So from the output of that command it seems my alternate pin config has been applied correctly, right? Also from the output of that command I cannot see anything else using the same pins. However if I write the the SPI bus I see nothing on the CLK, or MOSI lines, however the chip/slave select pin is working correctly. Any ideas what I’m missing? Thanks!

P.S. My program is definitely writing to the SPI bus properly, since I have observed the default pins before applying my custom device tree and CLK and MOSI looks good on those, its only when I try to change to use the alternate pins that I get no clock or data. Also I have access to an Aster carrier board if that helps.

Ok I have got it working!

First issue was a silly mistake - the schematic I was using from out hardware engineer was labelled SPI3, but was actually connected to SPI2’s alternate SPI pins. So the first step was changing references to ecspi3 to ecspi2. Also for my pinctrl I had not included a number at all, so now line 4 is pinctrl_ecspi2.

It still wasn’t working after that, but then I realised I was missing the pinctrl-names = "default"; in my ecspi2 node. After adding that all is working, and my waveshare oled screen connected to the SPI2 bus is displaying nice images.

Here is my final DTS for working ecspi2:

/dts-v1/;
#include "imx7d-colibri-emmc.dtsi"

/ {
	model = "Toradex Colibri iMX7D 1GB (eMMC) on Fermenter Carrier Board";
	compatible = "toradex,colibri-imx7d-emmc",
		         "toradex,colibri-imx7d",
		         "fsl,imx7d";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpio1 &pinctrl_gpio2 &pinctrl_gpio3 &pinctrl_gpio4>;

	pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX7D_PAD_ENET1_RGMII_TD2__ECSPI2_MISO     0x2 /* SODIMM 196 */
			MX7D_PAD_ENET1_RGMII_RD3__ECSPI2_MOSI     0x2 /* SODIMM 55 */
			MX7D_PAD_ENET1_RGMII_RD2__ECSPI2_SCLK	  0x2 /* SODIMM 63 */
		>;
	};
};

/* Colibri SSP */
&ecspi2 {
	status = "okay";

	cs-gpios = <&gpio7 9 GPIO_ACTIVE_LOW>; /* SODIMM 194 */
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_ecspi2>;

	/* &gpio2  3 GPIO_ACTIVE_HIGH SODIMM 117 OLED Data/Command  */

    spidev@0 {
		/* Use compatible "rohm,dh2228fv" to bind spidev driver */
		compatible = "rohm,dh2228fv";
		reg = <0>;
		spi-max-frequency = <10000000>;
	};
};