UART_B on Colibri VF61 with MQX

I using mqx 4.1.2(for MCC V1.0) on Colibri VF61 according http://developer.toradex.com/knowledge-base/mqx-on-the-cortex-m4-of-a-colibri-vf61
UART_B is disabled at vf-colibri-eval-v3.dtsi « dts « boot « arm « arch - linux-toradex.git - Linux kernel for Apalis and Colibri modules

root@colibri-vf:~# ls /dev/ |grep ttyLP
ttyLP0
ttyLP1
root@colibri-vf:~# cat /sys/kernel/debug/clk/clk_summary |grep uart
                                     uart5            0            0    83368421          0 0  
                                     uart4            0            0    83368421          0 0  
                                     uart3            0            0    83368421          0 0  
                                     uart2            0            0    83368421          0 0  
                                     uart1            1            1    83368421          0 0  
                                     uart0            1            1    83368421          0 0  
root@colibri-vf:~# 

But there is no output at UART_B.
Before UART_B is disabled in device tree, there is output from UART_B. Should UART_B be re-initialized in mqx after being disabled in device tree ?

Most likely this is either due to clock issues or pinmux issues.

Clocks: Can you try with passing clk_ignore_unused in the kernel arguments? It could be that the kernel disables relevant clocks.

Pinmux: Toradex uses PTD0/PTD1 ALT2 (on GPIO 79/80) for UART2 (UART_B in Toradex terms, TTYC in MQX terms). It seems that the standard pinmux in source/bsp/twrvf65gs10_m4/init_gpio.c uses something different, can you try this change in function _bsp_serial_io_init?

<         IOMUXC_SCI_FLX2_IPP_IND_SCI_RX_SELECT_INPUT = 0x00000000;
<         IOMUXC_SCI_FLX2_IPP_IND_SCI_TX_SELECT_INPUT = 0x00000000;
<         IOMUXC_RGPIO(28) = 0x007021A2;
<         IOMUXC_RGPIO(29) = 0x007021A1;
---
>         IOMUXC_SCI_FLX2_IPP_IND_SCI_RX_SELECT_INPUT = 0x00000002;
>         IOMUXC_SCI_FLX2_IPP_IND_SCI_TX_SELECT_INPUT = 0x00000002;
>         IOMUXC_RGPIO(79) = 0x002021A2;
>         IOMUXC_RGPIO(80) = 0x002021A1;

Yes, with configuration for clock and pinmux , UARTB works on M4 side.Thanks.