I have used the Toradex Pinout Designer Tool to select the function of each pin of the Apalis module. The next task is to create a device tree or device tree overlay file for this custom board.
Are there any tools to assist in the creation (and error checking) of this file?
I have looked at the NXP Config Tools for i.MX and they seem promising. Does Toradex have sample files for the Apalis Evaluation Board that could be used as a starting point for this tool?
Greetings @aunt_enna,
Currently outside of just plainly compiling the device trees from source, we do have some tooling around our Torizon offering that may be of interest to you.
On Torizon we provide a containerized tool that allows for the compilation and deployment of device tree overlays on the device itself. See here for more info: Device Tree Overlays on Torizon | Toradex Developer Center
The tool does some light checks and validation but it is still possible to compile an overlay that passes these checks but when applied still “breaks” the system. In the future we do hope to expand this tool for even device configuration capabilities, but I can’t provide any more details than this. With this tool we also have a Github repo with some templates/example overlays: device-tree-overlays/overlays at toradex_5.4.y · toradex/device-tree-overlays · GitHub
I will say though that if the changes to accommodate your custom board are significant it probably just makes more sense to create your own device tree rather than try and patch ours with overlays. Also I see you’re using our standard BSP anyways and not Torizon so this tooling may not even be applicable.
On a final note I don’t have an experience with the “NXP Config Tools for i.MX” so I can’t comment much there unfortunately.
Best Regards,
Jeremias
