When observing the POWER_ENABLE_MOCI signal that originates from the TK1 SOM, the assertion risetime of the signal from power-up or reset is around 100usec. However, on de-assertion, the falltime of the signal is stretched to almost 1.5msec, and follows a nearly linear ramp. The signal is pulled low (disabled default) through a 4.7K resistor and reaches nearly 3.3V when high, so is clearly able to source at least around 1mA. The other ioads on the signal are MOSFET gates and hi-Z converter EN inputs. One of those converter inputs is preceded by a 100K/10nF R-C delay; the 100K resistor effectively isolates the 10nF cap from the signal and should have very little effect on rise/fall times. The long falling delay has an effect on rail shutdown timing due to threshold differences between the MOSFET gate and converter EN inputs. If the falltime was anywhere near the risetime, this would not be an issue.
Is there any way to speed up the transition? The TK1 datasheet does not specify the electrical performance of this signal, and I’m afraid I’ll have to add a Schmitt buffer to it, unfortunately now on the next revision of our board.