TK1 POWER_ENABLE_MOCI asymmetrical transitions

When observing the POWER_ENABLE_MOCI signal that originates from the TK1 SOM, the assertion risetime of the signal from power-up or reset is around 100usec. However, on de-assertion, the falltime of the signal is stretched to almost 1.5msec, and follows a nearly linear ramp. The signal is pulled low (disabled default) through a 4.7K resistor and reaches nearly 3.3V when high, so is clearly able to source at least around 1mA. The other ioads on the signal are MOSFET gates and hi-Z converter EN inputs. One of those converter inputs is preceded by a 100K/10nF R-C delay; the 100K resistor effectively isolates the 10nF cap from the signal and should have very little effect on rise/fall times. The long falling delay has an effect on rail shutdown timing due to threshold differences between the MOSFET gate and converter EN inputs. If the falltime was anywhere near the risetime, this would not be an issue.

Is there any way to speed up the transition? The TK1 datasheet does not specify the electrical performance of this signal, and I’m afraid I’ll have to add a Schmitt buffer to it, unfortunately now on the next revision of our board.

Unfortunately, there is no way to speed up the transition of this signal. Since the PMIC on the module did not have a suitable output for the POWER_ENABLE_MOCI signal, we have connected it to the internal switched 3.3V rail. This means, the POWER_ENABLE_MOCI signal is actually a power rail. Adding an external pull down resistor will not change much since there are large capacitors on the rail.

Peter, thank you for revealing the cause to this mystery; I was beginning to wonder if I had damaged my module in some way. It would be wise to describe what you just stated here in the datasheet as most designers would otherwise expect that this signal exhibits fast digital transitions. In some designs, depending on the logic receiving the signal, the maximum rise-fall time may be violated and result in unstable behavior. Like I said, I’ll be adding a Schmitt buffer to our design but unfortunately we just built a bunch of cards not knowing about this. Has this signal/circuit design been retained on the V1.2A TK1?

I understand the issue you are facing with that solution for the POWER_ENABLE_MOCI signal. However, this is actually the first time I got a report in which such an issue is reported. The V1.2A of the Apalis TK1 still behaves the same, we did not change the circuit.