T30 taking more time than VF61 - SPI


I’m working with Colibri VF61 and T30 in some drivers development, and now it was SPI turn. For now kernel and sysfs are as-is except for some GPIO changes. For the SPI slave device, I’m working with 5" Riverdi displays with a FT810. The test is simply to read and write from/to the registers of the FT by sending large raw 800x480 images (RGB565 - 768KB). My surprise was that VF is taking around 550ms while the Tegra takes around 3500 ms! Since I don’t think that the Tegra is underclocked anyhow, I feel that Tegra may have too many processes running by default because it really feels slower overall and not just with the SPI. Therefore, I have 2 questions:

  1. Is there any documentation about what processes are launched at boot up (also removing this will reduce boot time, so 2x1)? I’d rather not go through all the boot sequence screen one by one, and avoid any confusion with driver loading.
  2. How can they be removed from the image created? Or at least being prevented to launch on boot. I’ve been already editing the kernel/dts source files but this is unrelated since it probably comes from the LXDE image downloaded (I’m using 2.7.2).

Thanks for the help,

My bad for updating this late, but I guess that better late than never… After finding some problems in an iMX6, I took a double look at my SPI code and found out I was missing a “0” in my SPI speed that somehow slipped through the VF61 (maybe incompatible speed?) but happened to work in the T30:

(Driver->Transfer is an array of struct spi_ioc_transfer)

Driver->Transfer[channel][0].delay_usecs = 0, //delay in us
Driver->Transfer[channel][0].speed_hz = 20000000, //speed
Driver->Transfer[channel][0].bits_per_word = 8, // bites per word 8
Driver->Transfer[channel][1].delay_usecs = 0;
Driver->Transfer[channel][1].speed_hz = 20000000;
Driver->Transfer[channel][1].bits_per_word = 8;

Thanks for letting us know.