I’m evaluating the SPI behavior in the VF61 running Linux 4.4.21.
With the help from Toradex, I’ve been able to properly enable and configure the SPIs of the VF61.
But, here comes another question:
I’m using a Logic Analyzer (Saleae Logic16) to see the SPI data flow.
After a SPI frame, the SPI keeps sendind clock and “pulses” of data on the MOSI signal. That’s odd!
I’ve captured this situation and here is it, from the view of the Logic Analyzer:
See that the signals are properly named at the left, beginning with SPI-CLOCK, SPI - ENABLE, SPI - MOSI and SPI - MISO.
The SPI clock is configured, for this simple example, at 500 KHz.
This signals are generated from the spidev.c sample program, available in the Kernel Source (I just modified the sample data for transmission), and it is using the spidev1.0 (SPI 1, CS 0).
This same behavior is observed when using others SPIs, like SPI0, SPI2 and even the SPI3.
This is a known issue?
That is nothing that can compromise our work, because the SPI only work on CS low.
But that is odd, don’t you think?
Thanks for your attention!