I modified my carrier board as shown in the attached Colibri_adapter-ETH2.pdf diagram with the connections to the Colibri iMX7D V 1.1A module.
I also modified the device tree to enable the second ethernet as per the attached file enet2_dts_and_log.txt.
The result of the boot log is:
root@colibri-imx7-emmc:~# dmesg | grep net [ 0.079399] imx7d_enet_clk_sel: fec1: failed to get enet_out clock, assuming ext. clock source [ 0.079495] imx7d_enet_clk_sel: fec2: found enet_out clock, assuming internal clock source [ 0.338243] libphy: fec_enet_mii_bus: probed [ 0.341202] fec 30be0000.ethernet eth0: registered PHC device 0 [ 0.345328] 30bf0000.ethernet supply phy not found, using dummy regulator [ 0.354470] libphy: fec_enet_mii_bus: probed [ 0.357247] fec 30bf0000.ethernet eth1: registered PHC device 1 [ 0.711751] nfnl_acct: registering with nfnetlink. [ 0.713779] nf_tables: (c) 2007-2009 Patrick McHardy [ 2.559343] using random self ethernet address [ 2.560592] using random host ethernet address [ 3.743513] Micrel KSZ8041 30be0000.ethernet-1:00: attached PHY driver [Micrel KSZ8041] (mii_bus:phy_addr=30be0000.ethernet-1:00, irq=-1) [ 3.771180] fec 30bf0000.ethernet eth1: no PHY, assuming direct connection to switch [ 3.776501] fec 30bf0000.ethernet eth1: could not attach to PHY [ 5.834429] fec 30be0000.ethernet eth0: Link is Up - 100Mbps/Full - flow control rx/tx root@colibri-imx7-emmc:~#
You can kindly help me to understand the following:
- why imx7d_enet_clk_sel: fec2: found enet_out clock, assuming internal clock source?
- why 30bf00.ethernet indicates supply PHY not found?
- what is the error because fec 30bf0000.ethernet eth1 does not recognize the PHY?
I cannot have the second ethernet port working and if I cannot solve this problem I’m forced to use a different module due to time constraints on my project.
Thanks in advance.
Ing. Paolo Bazzanella link text