Second Ethernet not working on Colibri iMX7D Module on custom carrier board

Technical Support colibri imx7d ethernet
Hi!

We are working on enabling second Ethernet support for our custom carrier board using the Colibri i.MX7D module.

We’re using a KSZ8041NL RMII PHY for this interface, but we are unable to get the 50MHz clock signal from the iMX7D module.

Details:

  • Module: Colibri iMX7D
  • PHY: KSZ8041NL with RMII interface
  • Kernel verson : 6.1.76

So far we tried:

  • Checked the hardware setup and ensured the RMII PHY is connected properly.
  • Verified the pin configuration.
  • Reviewed the device tree settings for the Ethernet interface, but still no clock.

Hardware snippet

Below is the device tree snippet currently using for the second Ethernet interface:

fec2: ethernet@30bf0000 {
                compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
                reg = <0x30bf0000 0x10000>;
                interrupt-names = "int0", "int1", "int2", "pps";
                interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
                        <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
                        <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
                        <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&clks IMX7D_ENET2_IPG_ROOT_CLK>,
                        <&clks IMX7D_ENET_AXI_ROOT_CLK>,
                        <&clks IMX7D_ENET2_TIME_ROOT_CLK>,
                        <&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
                        <&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
                clock-names = "ipg", "ahb", "ptp",
                        "enet_clk_ref", "enet_out";
                fsl,num-tx-queues = <3>;
                fsl,num-rx-queues = <3>;
                fsl,stop-mode = <&gpr 0x10 4>;
                status = "disabled";
        };


&fec2 {
                assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
                assigned-clock-rates = <0>, <100000000>;
                assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
                                  <&clks IMX7D_ENET2_TIME_ROOT_CLK>;
                fsl,magic-packet;
                phy-handle = <&ethphy1>;
                phy-mode = "rmii";
                pinctrl-names = "default", "lpsr_clock";
                pinctrl-0 = <&pinctrl_enet2>;
                pinctrl-1 = <&pinctrl_enet2_lpsr>;
                fsl,mii-exclusive;
                status = "okay";

                mdio {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        /* KSZ8041NL */
                        ethphy1: ethernet-phy@1 {
                                compatible = "ethernet-phy-ieee802.3-c22";
                                reg = <1>;
                                };
                };
};

pinctrl_enet2: enet2grp {
                fsl,pins = <
                        MX7D_PAD_GPIO1_IO15__ENET2_MDC                  0x3  /* SODIMM 178 */
                        MX7D_PAD_GPIO1_IO14__ENET2_MDIO                 0x3  /* SODIMM 188 */
                        MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0            0x73 /* SODIMM 114 */
                        MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1             0x73 /* SODIMM 116 */
                        MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL         0x73 /* SODIMM 122 */
                        MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER                0x73 /* SODIMM 124 */
                        MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0            0x73 /* SODIMM 127 */
                        MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1            0x73 /* SODIMM 130 */
                        MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL          0x73 /* SOIDMM 133 */
                >;
        };

pinctrl_enet2_lpsr: enet2lpsrgrp {
                fsl,pins = <
                        MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2     0x73 /* SODIMM 22 */
		>;
	};

We look forward to your guidance on resolving the issue with the second Ethernet interface.

Thanks in advance.

Vinoth

Hi, I’m the Toradex AI Assistant. The Toradex Support team will follow up with you shortly!

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Hi Vinoth,

It looks like you’ve done a thorough job of setting up the hardware and configuring the device tree for the second Ethernet interface on your custom carrier board using the Colibri iMX7D module. However, the issue with the 50MHz clock signal not being generated could be due to a few potential reasons. Let’s go through some troubleshooting steps:

  1. Clock Source Configuration:
    Ensure that the clock source for the RMII interface is correctly configured. The assigned-clock-parents and assigned-clock-rates properties in your device tree look correct, but double-check that the IMX7D_PLL_ENET_MAIN_100M_CLK is indeed set up to provide the necessary 50MHz clock.

  2. Pin Multiplexing:
    Verify that the pin multiplexing for the clock output pin is correctly set up. In your pinctrl_enet2_lpsr group, you have:

    MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2     0x73 /* SODIMM 22 */
    

    Ensure that this pin is correctly routed and not being used by another peripheral.

  3. Clock Enablement:
    Make sure that the clock is enabled in the CCM (Clock Control Module). Sometimes, clocks need to be explicitly enabled in the CCM registers.

  4. PHY Configuration:
    Ensure that the KSZ8041NL PHY is correctly configured to use the RMII interface and that it is expecting a 50MHz clock. Check the PHY datasheet for any specific configuration requirements.

  5. Device Tree Status:
    Ensure that the status property for the fec2 node is set to "okay" and not "disabled":

    status = "okay";
    
  6. Kernel Logs:
    Check the kernel logs (dmesg) for any errors or warnings related to the Ethernet interface or clock generation. This can provide clues as to what might be going wrong.

  7. Reference Designs:
    Refer to the Toradex reference designs and schematics for the Colibri iMX7D and ensure that your custom carrier board follows the recommended design practices for Ethernet interfaces.

If you’ve gone through these steps and the issue persists, it might be helpful to share the relevant sections of your kernel logs and any additional hardware details. Additionally, you can reach out to Toradex technical support for more in-depth assistance.

Best regards,
[Your Name]

Please, also check if these links can help you solve your problem:

PHY Interface for K60 - NXP Community.

Dear Toradex Team,

We are still facing issues with bringing up the second Ethernet interface. Could someone assist us with this?

Thanks in advance.

Regards,
Vinoth