Technical Support colibri imx7d ethernet
Hi!
We are working on enabling second Ethernet support for our custom carrier board using the Colibri i.MX7D module.
We’re using a KSZ8041NL RMII PHY for this interface, but we are unable to get the 50MHz clock signal from the iMX7D module.
Details:
- Module: Colibri iMX7D
- PHY: KSZ8041NL with RMII interface
- Kernel verson : 6.1.76
So far we tried:
- Checked the hardware setup and ensured the RMII PHY is connected properly.
- Verified the pin configuration.
- Reviewed the device tree settings for the Ethernet interface, but still no clock.
Hardware snippet
Below is the device tree snippet currently using for the second Ethernet interface:
fec2: ethernet@30bf0000 {
compatible = "fsl,imx7d-fec", "fsl,imx6sx-fec";
reg = <0x30bf0000 0x10000>;
interrupt-names = "int0", "int1", "int2", "pps";
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX7D_ENET2_IPG_ROOT_CLK>,
<&clks IMX7D_ENET_AXI_ROOT_CLK>,
<&clks IMX7D_ENET2_TIME_ROOT_CLK>,
<&clks IMX7D_PLL_ENET_MAIN_125M_CLK>,
<&clks IMX7D_ENET_PHY_REF_ROOT_CLK>;
clock-names = "ipg", "ahb", "ptp",
"enet_clk_ref", "enet_out";
fsl,num-tx-queues = <3>;
fsl,num-rx-queues = <3>;
fsl,stop-mode = <&gpr 0x10 4>;
status = "disabled";
};
&fec2 {
assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
assigned-clock-rates = <0>, <100000000>;
assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
<&clks IMX7D_ENET2_TIME_ROOT_CLK>;
fsl,magic-packet;
phy-handle = <ðphy1>;
phy-mode = "rmii";
pinctrl-names = "default", "lpsr_clock";
pinctrl-0 = <&pinctrl_enet2>;
pinctrl-1 = <&pinctrl_enet2_lpsr>;
fsl,mii-exclusive;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
/* KSZ8041NL */
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
};
pinctrl_enet2: enet2grp {
fsl,pins = <
MX7D_PAD_GPIO1_IO15__ENET2_MDC 0x3 /* SODIMM 178 */
MX7D_PAD_GPIO1_IO14__ENET2_MDIO 0x3 /* SODIMM 188 */
MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x73 /* SODIMM 114 */
MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x73 /* SODIMM 116 */
MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x73 /* SODIMM 122 */
MX7D_PAD_EPDC_SDCE1__ENET2_RX_ER 0x73 /* SODIMM 124 */
MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x73 /* SODIMM 127 */
MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x73 /* SODIMM 130 */
MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x73 /* SOIDMM 133 */
>;
};
pinctrl_enet2_lpsr: enet2lpsrgrp {
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO03__CCM_ENET_REF_CLK2 0x73 /* SODIMM 22 */
>;
};
We look forward to your guidance on resolving the issue with the second Ethernet interface.
Thanks in advance.
Vinoth