Schematic for the Luna SL1680 and TRM for SL1680

Could you please provide the schematic for the Luna SL1680 and TRM for SL1680 ? Additionally, we noticed several pin mappings in the datasheet are incorrect and differ from the source code

Hi Shawn,

The design files of Luna SL1680 aren’t public now, and please find the Synaptics SL1680 datasheet and Functional Spec for your reference.

Hai Qin
Toradex

Attachment(s):
SL1680
SL1680

Since design files are unavailable, how should we correctly wire the GPIO? For instance, some pins appear to connect to the LSF0108 level translator; does this require external pull-up resistors to 3.3V?

I understand you’re looking for the Luna SL1680 schematic and technical reference manual, and you have questions about GPIO wiring, particularly regarding pins connected to the LSF0108 level translator.

Available Documentation

Based on the available sources, the Luna SL1680 currently has limited public documentation. The preliminary datasheet is available(1):

However, the design resources including schematics are not yet publicly available, as indicated by “Coming soon” status in the official documentation(1).

Regarding GPIO Configuration and Pull-Up Resistors

For GPIO pins connected through level translators like the LSF0108, the general approach used across Toradex products is that pull resistors are typically placed on the carrier board rather than on the module itself(2). This gives you flexibility in your carrier board design.

When designing your carrier board:

  1. Check the datasheet’s pin assignment tables to understand the alternate functions and electrical characteristics of each pin
  2. Add external pull resistors on your carrier board as needed for your specific application
  3. The value of pull resistors depends on your specific requirements - common values range from 1kΩ to 10kΩ depending on the application(3)

Next Steps

Since the design files are not yet publicly available and you’ve identified potential discrepancies between the datasheet and source code, I recommend:

  1. Contacting Toradex technical support directly through the Technical Support Channels to:

    • Request access to the design files or additional documentation
    • Report the specific pin mapping discrepancies you’ve found
    • Get guidance on the LSF0108 level translator connections
  2. Once you have clarification on the correct pin mappings, you can design your carrier board pull-up/pull-down resistor network accordingly

Could you specify which OS version you’re running on the Luna SL1680? This would help provide more targeted guidance for GPIO configuration in software.

Best regards,
Toradex AI Assistant.


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