Idle power consumption on first booting the i.MX8XQP module with the provided image seems quite high, at 2.5 watts, compared to 0.8 watts or less with the i.MX7D module. I am using the Viola Plus carrier board for both. I assume this is primarily due to peripherals being enabled that I don’t need, and/or that aren’t supported by the Viola.
Are there specific known device tree mods necessary or recommended to reduce power consumption when using the module with the Viola carrier board in a headless application?
I can reduce it by about 80 milliwatts by adding a 200 MHz operating point to the dtb (the image comes with a dtb containing only 1.0 and 1.2 GHz operating points). Note that all three operating points have 0x0 for the voltage, which means the frequency scaling may not be giving us the full benefit in terms of power consumption.
I can reduce it further, to about 2.25 W, by changing “okay” to “disabled” in the lcdif, jpegenc, jpegdec, cdns3, and backlight subsystems in the dtb. (edit: looks like “cdns3” is responsible for all of this savings, the others have no effect)
I can reduce it further to 2.05 W by limiting Ethernet speed to 10baseT. The i.MX7D was at about 0.6 W in this state, for reference.
Looking forward to hearing about less obvious options.
The .dts file I was working from was produced by decompiling the .dtb file and therefore didn’t have any comments in it. Do you have a link to the upstream .dts file with the comments? That might help me figure out more opportunities for power reduction.
I can confirm that changing “pcie3” to “disabled” in the .dts file results in a relatively large drop in idle power consumption, to 1.55 watts when combined with marking “cdns3” disabled and adding a 200 MHz operating point. The chip runs significantly cooler (as measured by thermal_zone0) in this configuration than the default (about 41 C as opposed to 60 C or higher).
As a point of comparison, the Odroid C2 (a quad-core Cortex-A53) draws 780 mW at idle with the 4.20.2 kernel, 10baseT ethernet, 2 GB of DDR3 clocked at the default 912 MHz, the ondemand CPU governor at 200 MHz, and a reported core temperature of 28 °C. If you underclock the RAM to 408 MHz and disable USB in the device tree it drops to 640 mW. I hope that a design base on the Cortex-A35 with LPDDR4 can beat that, once things are more mature.
Is there a timeline for additional revisions of the BSP or the hardware? What about availability of the non-WiFi variant of the module?