New symlink for spidev0.0

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Greetings @Mehrdad,

Since I added the spidev0.0 to the DT, do I need to create a symlink to the dev directory to use it?

Symlinks are not required to use SPI or any of the interfaces We only add such symlinks ourselves for better naming than the default names for these interfaces.

I was looking at your previous question where you did your device tree changes to add this additional SPI: Modification pins on the Device Tree

In particular I was looking at this device tree change you made here:

/* Verdin SPI_2 TODO_MS */
&ecspi1 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3 >;
	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
};

You set the pinctrl-0 node to use the pinctrl_uart3 pins. However, I don’t see where you redefined these pins to be configured for SPI functionality. This is the pinctrl node here:

pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX		0x146	/* SODIMM 137 */
			MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX		0x146	/* SODIMM 139 */
			MX8MM_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B	0x146	/* SODIMM 141 */
			MX8MM_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B		0x146	/* SODIMM 143 */
		>;
	};

As you can see the pins defined here are configured for UART functionality. You need to change/redefine these pins for SPI functionality.

As a reference see the pinctrl_ecspi2 node that is used by the default SPI interface:

pinctrl_ecspi2: ecspi2grp {
		fsl,pins = <
			MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK		0x6	/* SODIMM 196 */
			MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI		0x6	/* SODIMM 200 */
			MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO		0x6	/* SODIMM 198 */
			MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13		0x6	/* SODIMM 202 */
		>;
	};

Best Regards,
Jeremias

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