any suggestion on how to get LCD and LVDS channel 1 working at the same time (on Linux)?
They are working correctly alone, but if I enable both only LCD output is working.
LVDS channel 0 is disabled, LVDS channel 1 is enabled and set to primary.
No changes on IPU/DI assignment from original apalis dtsi file (I have tried to change with no luck).
(LVDS0 + LVDS1 is working correctly on a different setup).
The IPU’s share some of their clocking. The display drivers however do not take this into account. So the second driver instance might mess with the clocking the first driver instance requested. This of course depends a lot on the used timings.
You could compare the clock tree’s from only LVDS, only LCD and the combined boots to check for something obvious.
e.g. cat /sys/kernel/debug/clk/clk_summary > LVDS_clk.txt
Changing the order of which fb goes to which output and/or changing the timings on one or the other output might help.
Changing the FB order is not changing anything.
LCD are exacly the same (800x480 @ 60 Hz , pixel clk @ 33.27 MHz), only the connection on imx6 is different (LDB vs parallel RGB)
attached clk summaries for all the 4 permutation
Can you try to recompile the kernel with the attached patch?
This should set the parent clock at a non changeable rate which can be used to divide the needed clocks for LCD and LVDS.
If it does not help can you also indicate your actual timings and how you set them.
I confirm that this patch solve the problem, thanks