Hi Toradex Team ,
We are using Apalis iMX6 SOC with IXORA carrier board to evaluate SPI .
SPI interface would be used to read data from high speed ADC .
Could you please provide pointers as to how can we remove below mentioned time delay :-
SPI chip select going low to start of first SPI CLOCK = 8.27 Micro Seconds
Last SPI clock to Chip Select going high = 40.87 Micro Seconds
No clock pulse between successive spi clock burst = 296 Micro Seconds.
Attached along is the Linux DTB file and snapshot for your reference.