@eoin_oc1,
I have looked at your patch and I found this part interesting:
* Due to limited video PLL frequency points on i.MX8mp,
* we do mode fixup here in case any mode is unsupported.
*/
- if (ldb->dual)
- mode->clock = mode->clock > 100000 ? 148500 : 74250;
- else
- mode->clock = 74250;
+ //if (ldb->dual)
+ //mode->clock = mode->clock > 100000 ? 148500 : 74250;
+ //else
+ //mode->clock = 74250;
It seems that the driver is limiting the pixel clock on purpose, but this explanation
Due to limited video PLL frequency points on i.MX8mp
we do mode fixup here in case any mode is unsupported.
doesn’t make much sense, especially since you were able to setup the correct pixel clock with the changes you sent.
Were you able to measure the correct pixel clock with the oscilloscope after these changes?