I’m designing a carrier board for iMX7D modules that will have a second ethernet port using the gigabit PHY KSZ9031/9021 connected via RGMII.
There is an issue with the main oscillator on the modules, as described here: Offset in main oscillator in imx7d - Toradex Community
According to iMX7 ref. manual from NXP, it seems possible to have the reference clock for ENET2 from a couple of pins, including EPDC_BDR0:
But using the Toradex Pinout Designer, it is not possible to select any pin as the reference clock for the ETH 2 MAC using RGMII, only using RMII:
So my question is: Can I use the PHY’s generated 125MHz on the pin 106 of the SOM as ref. clock for the second ethernet?