Imx7 spi writes of more than 8 bits fail

I’m compiling applications to run on an imx7 dual core colibri board using QT. I can do an open() of a spi channel from QT and use ioctl() to change the number of bits written to less than the default of 8, then I can do a write() and see that number of bits physically going out the pins. Wonderful! But if I change the number of bits on transmit to be more than 8, the write fails. I didn’t see anything in the DTSI code that would limit this and I didn’t see any obvious bugs in the kernel spi source code. Any ideas? - thanks in advance, Eric

After the write, I see an errno of 110 which is a connection time out. Also after the write, if I look at the control register from the SPI engine - I see a the “number of bits” field left to what I set it to. If I do further writes - they fail as well. Trying a shorter burst size does not help. I use all other values as defaults. I am doing this on SPI3 which is the only one supported in my dev/spi directory. I suspect this is going off the rails in the sdma part of the transmission. I don’t see any data physically going out the SPI or clock

Quickly tested with 16 bits using this example on a 2.7b2 image, it seems to work here:

root@colibri-imx7:~# ./spi-test /dev/spidev2.0 
Open device /dev/spidev2.0
SPI mode: 0
bits per word: 16
max speed: 10000000 Hz (10000 kHz)
after initialisation of array rx:

00 00 00 00 00 00 
Send SPI message...

after read of kernel buffer, rx:
00 00 00 00 00 00