I am trying to configure the device tree to enable uart3 on the colibri imx6ull. I changed the default provided device tree file (imx6ull-colibri-wifi-eval-v3.dts) to the following:
/dts-v1/;
#include "imx6ull.dtsi"
#include "imx6ull-colibri.dtsi"
#include "imx6ull-colibri-wifi.dtsi"
#include "imx6ull-colibri-eval-v3.dtsi"
/ {
model = "Toradex Colibri iMX6ULL 512MB Custom";
compatible = "toradex,colibri_imx6ull-wifi-eval", "fsl,imx6ull";
};
&iomuxc {
imx6ull-custom {
pinctrl_uart3: uart3-grp {
fsl,pins = <
MX6UL_PAD_UART3_TX_DATA__UART3_DTE_RX 0x1b0b1
MX6UL_PAD_UART3_RX_DATA__UART3_DTE_TX 0x1b0b1
>;
};
};
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
fsl,dte-mode;
status = "okay";
};
The problem is it does not work unless I also remove the corresponding pins from the pin hog group in the imx6ull-colibri.dtsi file:
pinctrl_hog_1: hoggrp-1 {
fsl,pins = <
MX6UL_PAD_ENET1_RX_DATA0__GPIO2_IO00 0x74 /* SODIMM 55 */
MX6UL_PAD_ENET1_RX_DATA1__GPIO2_IO01 0x74 /* SODIMM 63 */
/*MX6UL_PAD_UART3_RX_DATA__GPIO1_IO25 0X14 SODIMM 77 */
MX6UL_PAD_JTAG_TCK__GPIO1_IO14 0x14 /* SODIMM 99 */
MX6UL_PAD_NAND_CE1_B__GPIO4_IO14 0x14 /* SODIMM 133 */
/*MX6UL_PAD_UART3_TX_DATA__GPIO1_IO24 0x14 SODIMM 135 */
MX6UL_PAD_UART3_CTS_B__GPIO1_IO26 0x14 /* SODIMM 100 */
MX6UL_PAD_JTAG_TRST_B__GPIO1_IO15 0x14 /* SODIMM 102 */
MX6UL_PAD_ENET1_RX_ER__GPIO2_IO07 0x14 /* SODIMM 104 */
MX6UL_PAD_UART3_RTS_B__GPIO1_IO27 0x14 /* SODIMM 186 */
>;
};
When I comment out the pins it works, however this doesn’t seem like the cleanest way of modifying the device tree. Is there a way I can get it working without having to edit the .dtsi files?
Thanks