How to enable GPIO in device tree of imx6?

I want to have gpio register as default.
in the reference manual the pins are described as follows


Through the gpio-tool it looks following


changing it manually like below then it works for me

I want to have this change in the device tree permanently. For that I did following change in my dts file
&iomuxc {
/* Mux the Apalis GPIOs */
pinctrl-names = “default”;
pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2
&pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4
&pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6
&pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8
>, <&pinctrl_canerr_gpios>;

    pinctrl_leds_ixora: ledsixoragrp {
            fsl,pins = <
                    MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
                    MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
                    MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
                    MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
            >;
    };

    pinctrl_uart24_forceoff: uart24_forceoff {
            fsl,pins = <
                    MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0
            >;
    };

    pinctrl_canerr_gpios: canerr_gpios_grp {
            fsl,pins = <
                    MX6QDL_PAD_SD1_DAT1__SD1_DATA1      0x00000005
                    MX6QDL_PAD_SD1_DAT2__SD1_DATA2      0x00000005
            >;
    };

};

pinctrl_canerr_gpios: canerr_gpios_grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x00000005
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x00000005
>;

does not make any difference. Can someone help me out. I shall be very thankful.

output of command ** cat /sys/kernel/debug/pinctrl/pinctrl-handles** is

Blockquote
Requested pin control handlers their pinmux maps:
device: 20e0000.iomuxc current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: gpio2io04grp (0) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_NANDF_D4 (195)config 000130b0
type: MUX_GROUP controller 20e0000.iomuxc group: gpio2io05grp (1) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_NANDF_D5 (196)config 000130b0
type: MUX_GROUP controller 20e0000.iomuxc group: gpio2io06grp (2) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_NANDF_D6 (197)config 000130b0
type: MUX_GROUP controller 20e0000.iomuxc group: gpio2io07grp (3) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_NANDF_D7 (198)config 000130b0
type: MUX_GROUP controller 20e0000.iomuxc group: gpio6io10grp (4) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_NANDF_RB0 (184)config 000130b0
type: MUX_GROUP controller 20e0000.iomuxc group: gpio6io09grp (5) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_NANDF_WP_B (183)config 000130b0
type: MUX_GROUP controller 20e0000.iomuxc group: gpio1io02grp (6) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_2 (141)config 000130b0
type: MUX_GROUP controller 20e0000.iomuxc group: gpio1io06grp (7) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_6 (140)config 000130b0
type: MUX_GROUP controller 20e0000.iomuxc group: canerr_gpios_grp (59) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD1_DAT1 (207)config 00000005
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD1_DAT2 (211)config 00000005
device: regulator-usb-otg-vbus current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: gpioregusbotgpwrgrp (38) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D22 (42)config 0000f058
device: regulator-usb-host-vbus-hub current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: gpioregusbhubpwrgrp (37) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D28 (49)config 0000f058
device: regulator-usb-host-vbus current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: gpioregusbhpwrgrp (36) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_0 (136)config 0000f058
device: i2c@0 current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: gpioi2cddcgrp (20) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_EB2 (35)config 0001b0b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D16 (36)config 0001b0b0
device: 21a0000.i2c current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: i2c1grp (22) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT9 (159)config 0001b8b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT8 (158)config 0001b8b1
state: gpio
type: MUX_GROUP controller 20e0000.iomuxc group: i2c1recoverygrp (23) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT9 (159)config 0001b8b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT8 (158)config 0001b8b1
device: 21a4000.i2c current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: i2c2grp (24) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_COL3 (132)config 0001b8b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_ROW3 (133)config 0001b8b1
state: gpio
type: MUX_GROUP controller 20e0000.iomuxc group: i2c2recoverygrp (25) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_COL3 (132)config 0001b8b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_ROW3 (133)config 0001b8b1
device: 21a8000.i2c current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: i2c3grp (26) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D17 (37)config 0001b8b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D18 (38)config 0001b8b1
state: gpio
type: MUX_GROUP controller 20e0000.iomuxc group: i2c3recoverygrp (27) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D17 (37)config 0001b8b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D18 (38)config 0001b8b1
device: 21d8000.audmux current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: audmuxgrp (8) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT20 (112)config 000130b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT21 (113)config 000130b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT22 (114)config 000130b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT23 (115)config 000130b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_5 (143)config 000130b0
device: 2080000.pwm current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: pwm1grp (32) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_9 (138)config 0001b0b1
device: 2084000.pwm current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: pwm2grp (33) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_1 (137)config 0001b0b1
device: 2088000.pwm current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: pwm3grp (34) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD4_DAT1 (200)config 0001b0b1
device: 208c000.pwm current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: pwm4grp (35) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD4_DAT2 (201)config 0001b0b1
device: backlight current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: gpioblon (17) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_DA13 (82)config 0001b0b0
device: vdac@0 current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: ipu2vdacgrp (30) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DI0_DISP_CLK (87)config 000000d1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DI0_PIN15 (88)config 000000d1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DI0_PIN2 (89)config 000000d1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DI0_PIN3 (90)config 000000d1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT0 (92)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT1 (93)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT2 (94)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT3 (95)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT4 (96)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT5 (97)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT6 (98)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT7 (99)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT8 (100)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT9 (101)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT10 (102)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT11 (103)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT12 (104)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT13 (105)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT14 (106)config 000000f9
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_DISP0_DAT15 (107)config 000000f9
device: 2020000.serial current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: uart1dtegrp (44) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT10 (160)config 0001b0b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT11 (161)config 0001b0b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D19 (39)config 0001b0b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D20 (40)config 0001b0b1
type: MUX_GROUP controller 20e0000.iomuxc group: uart1ctrlgrp (45) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D23 (43)config 0001b0b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D24 (45)config 0001b0b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_D25 (46)config 0001b0b0
device: 21e8000.serial current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: uart2dtegrp (47) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD4_DAT4 (203)config 0001b0b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD4_DAT7 (206)config 0001b0b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD4_DAT6 (205)config 0001b0b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD4_DAT5 (204)config 0001b0b1
type: MUX_GROUP controller 20e0000.iomuxc group: uart24_forceoff (58) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD2_CMD (214)config 0001b0b0
device: 21f0000.serial current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: uart4dtegrp (49) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_COL0 (126)config 0001b0b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_ROW0 (127)config 0001b0b1
device: 21f4000.serial current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: uart5dtegrp (51) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_COL1 (128)config 0001b0b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_ROW1 (129)config 0001b0b1
device: 2188000.ethernet current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: enetgrp (12) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_ENET_MDIO (116)config 000100b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_ENET_MDC (125)config 000100b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_TXC (22)config 00010030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_TD0 (23)config 00010030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_TD1 (24)config 00010030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_TD2 (25)config 00010030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_TD3 (26)config 00010030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_TX_CTL (29)config 00010030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_ENET_REF_CLK (117)config 000100b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_RXC (33)config 0001b030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_RD0 (28)config 0001b030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_RD1 (30)config 0001b030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_RD2 (31)config 0001b030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_RD3 (32)config 0001b030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_RGMII_RX_CTL (27)config 0001b030
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_ENET_CRS_DV (119)config 000000b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_ENET_TXD0 (124)config 000000b1
device: 2184000.usb current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: usbotggrp (52) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_ENET_RX_ER (118)config 00017059
device: 2198000.usdhc current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: usdhc3grp (56) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_CMD (174)config 00017059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_CLK (175)config 00010059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_DAT0 (176)config 00017059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_DAT1 (177)config 00017059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_DAT2 (178)config 00017059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_DAT3 (179)config 00017059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_DAT4 (173)config 00017059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_DAT5 (172)config 00017059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_DAT6 (171)config 00017059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_DAT7 (170)config 00017059
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD3_RST (180)config 00017059
device: leds current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: ledsixoragrp (57) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD2_DAT1 (19)config 0001b0b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_SD2_DAT3 (215)config 0001b0b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_NANDF_D1 (192)config 0001b0b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_NANDF_D2 (193)config 0001b0b0
device: gpio-keys current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: gpio1io04grp (18) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_4 (142)config 0001b0b0
device: 2090000.flexcan current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: flexcan1defgrp (13) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_7 (144)config 0001b0b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_8 (145)config 0001b0b0
state: sleep
type: MUX_GROUP controller 20e0000.iomuxc group: flexcan1slpgrp (14) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_7 (144)config 00000000
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_8 (145)config 00000000
device: 2094000.flexcan current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: flexcan2defgrp (15) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_COL4 (134)config 0001b0b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_ROW4 (135)config 0001b0b0
state: sleep
type: MUX_GROUP controller 20e0000.iomuxc group: flexcan2slpgrp (16) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_COL4 (134)config 00000000
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_KEY_ROW4 (135)config 00000000
device: 2008000.ecspi current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: ecspi1grp (10) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT6 (156)config 000100b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT5 (155)config 000100b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT4 (154)config 000100b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_CSI0_DAT7 (157)config 000000b1
device: 200c000.ecspi current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: ecspi2grp (11) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_OE (64)config 000100b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_CS1 (63)config 000100b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_CS0 (62)config 000100b1
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_EIM_RW (65)config 000000b1
device: 2004000.spdif current state: default
state: default
type: MUX_GROUP controller 20e0000.iomuxc group: spdifgrp (41) function: iomuxc (0)
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_16 (146)config 0001b0b0
type: CONFIGS_PIN controller 20e0000.iomuxc pin MX6Q_PAD_GPIO_17 (147)config 0001b0b0
Blockquote

complete dts file is

Blockquote
/*

  • Copyright 2014-2019 Toradex AG
  • Copyright 2012 Freescale Semiconductor, Inc.
  • Copyright 2011 Linaro Ltd.
  • This file is dual-licensed: you can use it either under the terms
  • of the GPL or the X11 license, at your option. Note that this dual
  • licensing only applies to this file, and not this project as a
  • whole.
  • a) This file is free software; you can redistribute it and/or
  • modify it under the terms of the GNU General Public License
    
  • version 2 as published by the Free Software Foundation.
    
  • This file is distributed in the hope that it will be useful,
    
  • but WITHOUT ANY WARRANTY; without even the implied warranty of
    
  • MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    
  • GNU General Public License for more details.
    
  • Or, alternatively,
  • b) Permission is hereby granted, free of charge, to any person
  • obtaining a copy of this software and associated documentation
    
  • files (the "Software"), to deal in the Software without
    
  • restriction, including without limitation the rights to use,
    
  • copy, modify, merge, publish, distribute, sublicense, and/or
    
  • sell copies of the Software, and to permit persons to whom the
    
  • Software is furnished to do so, subject to the following
    
  • conditions:
    
  • The above copyright notice and this permission notice shall be
    
  • included in all copies or substantial portions of the Software.
    
  • THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
    
  • EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
    
  • OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
    
  • NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
    
  • HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
    
  • WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
    
  • FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
    
  • OTHER DEALINGS IN THE SOFTWARE.
    

*/

/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pwm/pwm.h>
#include “imx6q.dtsi”
#include “imx6qdl-apalis.dtsi”

/ {
model = “Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.1”;
compatible = “toradex,apalis_imx6q-ixora-v1.1”,
“toradex,apalis_imx6q-ixora”, “toradex,apalis_imx6q”,
“fsl,imx6q”;

aliases {
	i2c0 = &i2c1;
	i2c1 = &i2c3;
	i2c2 = &i2c2;
};

chosen {
	stdout-path = "serial0:115200n8";
};

gpio-keys {
	compatible = "gpio-keys";
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpio_keys>;

	wakeup {
		label = "Wake-Up";
		gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
		linux,code = <KEY_WAKEUP>;
		debounce-interval = <10>;
		wakeup-source;
	};
};

panel: panel-lvds0 {
	compatible = "innolux,g101ice-l01", "simple-panel";
	backlight = <&backlight>;
	port {
		panel_in_lvds0: endpoint {
			remote-endpoint = <&lvds0_out>;
		};
	};
};

leds {
	compatible = "gpio-leds";

	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_leds_ixora>;

	led4-green {
		label = "LED_4_GREEN";
		gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
	};

	led4-red {
		label = "LED_4_RED";
		gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
	};

	led5-green {
		label = "LED_5_GREEN";
		gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
	};

	led5-red {
		label = "LED_5_RED";
		gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
	};
};

reg_3v3_sw: regulator-3v3-sw {
	compatible = "regulator-fixed";
	regulator-name = "3.3V_SW";
	regulator-min-microvolt = <3300000>;
	regulator-max-microvolt = <3300000>;
	regulator-always-on;
};

v4l2_cap_0 {
	compatible = "fsl,imx6q-v4l2-capture";
	ipu_id = <0>;
	csi_id = <0>;
	mclk_source = <0>;
	status = "okay";
};

v4l2_cap_2 { // mipi-csi2 camera
	compatible = "fsl,imx6q-v4l2-capture";
	ipu_id = <0>;
	csi_id = <1>;
	mclk_source = <0>;
	status = "okay";
};

};

&backlight {
/* 200Hz PWM frequency is best [ns] */
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
pwms = <&pwm4 0 5000000 0>;
status = “okay”;
};

&can1 {
xceiver-supply = <&reg_3v3_sw>;
status = “okay”;
};

&can2 {
xceiver-supply = <&reg_3v3_sw>;
status = “okay”;
};

/* Apalis SPI1 /
&ecspi1 {
status = “okay”;
spidev0: spidev@0 {
compatible = “microchip,ksz8895”,
“microchip,ksz8864”,
“toradex,evalspi”;
spi-max-frequency = <25000000>;
reg = <0>; /
first CS */
reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
status = “okay”;

	spi-cpha;
	spi-cpol;
	ports {
		#address-cells = <1>;
		#size-cells = <0>;
		port@0 {
			reg = <0>;
			label = "lan1";
		};
		port@1 {
			reg = <1>;
			label = "lan2";
		};
		port@2 {
			reg = <2>;
			label = "lan3";
		};
		port@4 {
			reg = <4>;
			label = "cpu";
			ethernet = <&fec>;
			fixed-link {
				speed = <100>;
				full-duplex;
			};
		};
	};
};

};

/* Apalis SPI2 */
&ecspi2 {
status = “okay”;

spidev1: spidev@2 {
	compatible = "rohm,dh2228fv";
	reg = <0 1>;
	spi-max-frequency = <24000000>;
};

};

&hdmi_audio {
status = “okay”;
};

&hdmi_cec {
status = “okay”;
};

&hdmi_core {
status = “okay”;
};

&hdmi_video {
status = “okay”;
};

/* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */
&i2c1 {
status = “okay”;

/* AD7997, 8-channel, 10-bit ADC */
ad7997_IC801@33 {
	compatible = "adi,ad7997";
	reg = <0x21>;
};
ad7997_IC800@34 {
	compatible = "adi,ad7997";
	reg = <0x22>;
};

};

/*

  • Nothing on carrier board for this bus

*/
&i2c3 {
status = “okay”;
};

/*

  • DDC_I2C: I2C2_SDA/SCL on MXM3 205/207
    */
    &i2cddc {
    status = “okay”;

    hdmi_ddc: edid@50 {
    compatible = “fsl,imx6-hdmi-i2c”;
    reg = <0x50>;
    };
    };

&ipu1_di1_disp1 {
remote-endpoint = <&panel_in_lvds0>;
};

&lcd {
status = “disable”;
};

&ldb {
status = “okay”;
lvds-channel@0 {
reg = <0>;
fsl,data-mapping = “spwg”; /* “jeida”; */
fsl,data-width = <24>;
crtc = “ipu2-di1”;
primary;
status = “okay”;

	display-timings {
		/delete-property/800x600;
		/delete-property/1024x768;
		/delete-property/1920x1080;

		native-mode = <&timing_wxga>;
		timing_wxga: 1280x800 {
			clock-frequency = <71100000>;  /* <68930000> */

			/delete-property/hsync-active;
			/delete-property/vsync-active;

			hactive = <1280>;
			vactive = <800>;
			hfront-porch = <16>;
			hback-porch = <16>;
			hsync-len = <128>;		/* <82 160 200> */
			vfront-porch = <14>;
			vback-porch = <3>;
			vsync-len = <6>;		/* <10 23 29> */
			pixelclk-active = <1>;
		};
	};
	lvds0_out: endpoint {
		remote-endpoint = <&panel_in_lvds0>;
	};
};
lvds-channel@1 {
	status = "disabled";
};

};

&mipi_csi {
ipu_id = <0>;
csi_id = <1>;
v_channel = <0>;
lanes = <2>;
status = “okay”;
};

&mxcfb1 {
status = “okay”;
};

&mxcfb2 {
status = “okay”;
};

&mxcfb3 {
status = “okay”;
};

&mxcfb4 {
status = “okay”;
};

&pcie {
reset-gpio = <&gpio1 28 0>;
};

&pwm1 {
status = “okay”;
};

&pwm2 {
status = “okay”;
};

&pwm3 {
status = “okay”;
};

&pwm4 {
status = “okay”;
};

&reg_usb_host_vbus {
status = “okay”;
};

&reg_usb_otg_vbus {
status = “okay”;
};

&sata {
status = “okay”;
};

&sound_hdmi {
status = “okay”;
};

&sound_spdif {
status = “okay”;
};

&spdif {
status = “okay”;
};

&uart1 {
status = “okay”;
};

&uart2 {
status = “okay”;
pinctrl-names = “default”;
pinctrl-0 = <&pinctrl_uart2_dte &pinctrl_uart24_forceoff>;
#if 0
linux,rs485-enabled-at-boot-time;
rs485-rts-active-low;
rs485-rx-during-tx;
#endif
};

&uart4 {
status = “okay”;
/*
* note that uart4 is only working with pinctrl_uart24_forceoff that is
* already defined in &uart2
*/
};

&uart5 {
status = “okay”;
};

&usbh1 {
vbus-supply = <&reg_usb_host_vbus>;
status = “okay”;
};

&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
status = “okay”;
};

/* MMC1 */
&usdhc1 {
pinctrl-names = “default”;
pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>;
cd-gpios = <&gpio4 20 GPIO_ACTIVE_LOW>;
bus-width = <4>;
status = “okay”;
};

&vdac {
status = “okay”;
};

&iomuxc {
/* Mux the Apalis GPIOs */
pinctrl-names = “default”;
pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2
&pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4
&pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6
&pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8
>, <&pinctrl_canerr_gpios>;

pinctrl_leds_ixora: ledsixoragrp {
	fsl,pins = <
		MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0
		MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0
		MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
		MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
	>;
};

pinctrl_uart24_forceoff: uart24_forceoff {
	fsl,pins = <
		MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0
	>;
};

pinctrl_canerr_gpios: canerr_gpios_grp {
	fsl,pins = <
		MX6QDL_PAD_SD1_DAT1__SD1_DATA1      0x00000005
		MX6QDL_PAD_SD1_DAT2__SD1_DATA2      0x00000005
	>;
};

};

Blockquote

Hi, I’m the Toradex AI Assistant. I’m in early beta, and I would appreciate your feedback.
The Toradex Support team will follow up with you shortly!

Did you like my answer?

:+1: :-1:


To permanently enable GPIOs in the device tree for an i.MX6-based system, you need to ensure that the pins are properly configured in the IOMUXC (I/O multiplexer controller) settings within the device tree source (DTS) file. From your description, it seems you’ve attempted to configure various GPIOs but are facing issues with the changes taking effect.

Given your context, here are a few steps and considerations to ensure your GPIO configurations are correctly applied:

  1. Correct Pin Configuration: Ensure that the pin configurations (fsl,pins) in your DTS file match the desired hardware functionality. Each pin configuration includes the pad name, mux mode, and pad control settings (such as pull-up/down, speed, and drive strength). The hexadecimal values you’ve provided (e.g., 0x1b0b0) should match the requirements for GPIO usage as per the i.MX6 Reference Manual.

  2. Disable Conflicting Functions: If the pins you’re configuring as GPIOs are also defined elsewhere in the DTS or included DTSI files for other functions (e.g., UART, SPI, etc.), you need to ensure those functions are disabled or reconfigured to prevent conflicts. Use the status = "disabled"; property to disable nodes that might be using the pins you intend to use as GPIOs.

  3. Verify Pin Groupings: Your GPIO configurations are grouped under pinctrl_leds_ixora, pinctrl_uart24_forceoff, and pinctrl_canerr_gpios. Ensure these groupings are correctly referenced in the nodes that are supposed to use them. For instance, if these pins are meant for LED control, the corresponding LED node should reference pinctrl_leds_ixora.

  4. Check for Typos and Syntax Errors: Ensure there are no typos or syntax errors in your DTS file. Even a small mistake can prevent the device tree blob (DTB) from being correctly applied.

  5. Recompile and Deploy the Device Tree Blob: After making changes to the DTS file, you need to recompile it into a DTB using the appropriate cross-compilation tools for your development environment. Then, ensure this DTB is correctly deployed to your device, replacing the existing DTB used by the bootloader.

  6. Debugging: Use the Linux kernel’s device tree debugging facilities, such as /proc/device-tree/ and dtc (Device Tree Compiler) tool to decompile the active

Please, also check if these links can help you solve your problem:

Pinmuxing i.MX 8/8X Based Modules | Toradex Developer Center.

The issue has been resolved correct register in my case were

MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x0
MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x0

Hi @Usman,

Thanks for sharing the solution to your problem.

If you have other issues, please feel free to post again in the community.

Best Regards,
Bruno