Help with second ethernet PHY in imx6ULL

Looking for schematic-level information on successfully connecting a second PHY to the RMII interface. Any standard RMII PHY would suffice, such as the KSZ8041FTL.

First there is likely a typo in Colibri iMX6ULL Datasheet pg 32, pin 178 description is “RMII_TXEN”, looks like it should be “RMII_RXEN” from the data in the “iMX6ULL Function” column.

Second, there are 3 pins (19, 67, & 8) all lumped together under the function “anatop.ENET_REF_CLK1” with the description, “50MHz Reference clock that is provided from the MAC to the PHY or from the PHY to the MAC”. Real hard to design a board from this info! Are all 3 valid depending on the device tree? Is one of the 3 in the default device tree already? Is the stable linux build configured to use a particular one of the 3? Does the default build expect the clock to be generated by the imx6ULL MAC, the external PHY, or an external 50MHz oscilator? This is all very ambiguous without further information.

Many thanks!
Summer

Yes, there is a typo. It should be " pin 178 - RMII_RXEN"

"Each NXP i.MX 6ULL SoC I/O pin can be configured to one of the up to ten alternate functions.

It is strongly recommended that whenever it is possible, use the primary interfaces before using any alternate interfaces. This ensures the best compatibility between the Toradex standard software, operating systems/BSPs, and other modules in the Colibri family.

Most of the alternate functions are available on more than one pin. Care should be taken to ensure that two pins are not configured with the same function. This could lead to system instability and undefined behavior" ( Chapter 4.1 Function Multiplexing, Colibri iMX6ULL Datasheet)

Primary and alternative functions of each pin listed at chapter 4.4.1 SODIMM 200)

Since neither one of Toradex carrier board has a second Ethernet PHY the default device tree has no configuration for ENET_REF_CLK1. So you can select any of that pin for ENET_REF_CLK1 but you have to check their functions is not used for some other required peripherals.

We have a pinout designer tool to help avoid conflicts in multiplexing.