Help to decode PINMUX parameters of SPI node in imx6q-apalis-ixora.dts

Hi Toradex Team ,
I am trying to understand the device tree aspect for ecspi@02008000.

In the ecspi@02008000 the pinmux details are providded by calling
pinctrl-0 = <0xa 0xb>;

ecspi {                                          
	ecspi1grp{
		fsl,pins = <0x270 0x640 0x7f8 0x2 0x3 0x100b1 0x26c 0x63c 0x7fc 0x2 0x3 0x100b1 0x268 0x638 0x7f4 0x2 0x3 0x100b1>;
             linux,phandle = <0xa>;           
             phandle = <0xa>;                 
	 };                                       
 
                                                                            
	spi_cs1 {
		fsl,pins = <0x274 0x644 0x0 0x5 0x0 0x80000000>;
		linux,phandle = <0xb>;           
		phandle = <0xb>;                 
	};                                       

};   

As per fsl,imx-pinctrl.txt its mentioned that the value would be multiple of 6 parameters i.e mux_reg , conf_reg , input_reg , mux_val , input_val ,CONFIG

Could team member please provide an pointer as to how these values were determined or where can i look to understand more about this.

Please have a look at Device Tree Customization article.

Dear Sanchayan ,
Thanks for inputs .
Following the link i have created an PINMUXING for GPIO node ,but can’t find an entry of it under /sys/class/gpio.
I am Trying to configure GPIO02 i.e X1 pin number 15.
I am attaching an snapshot of same here .
If possible could you let me if i am missing any aspect here.alt text

fsl,pins needs to be in a pinctrl node. Please see existing device tree node for correct usage. Do you want GPIO1_IO02 to be a regular GPIO? If so, why use it in the ADC node? If you want to use it as a regular GPIO, see existing usage here and here.

Dear Sanchayan ,
made the changes suggested above , but there is no entry of GPIO being created in /sys .

Also checked with the pinumx debug file in /sys , it states pin 15 (MX6Q_PAD_RESERVE15): (MUX UNCLAIMED) (GPIO UNCLAIMED)

Attached is the snapshot of doing the pinmux in gpio section and claiming the gpio & the result on board.

Could you please provide some pointer as to where am i going wrong.
This is my first project with device-tree , hence seeking some help on pointers
alt text.

Screenshots are not helpful. Proper short code sequences or git diffs are preferable. Can you clarify what exactly are you trying to do with this gpio? Is the gpio suppose to be an interrupt for the driver?

Dear Sanchayan ,
Thanks for help.

Yes this GPIO we are going to use to event capturing

Details :-
( I am trying to get GPIO1_IO02 bind to our driver as GPIO Pin for initial round of evaluation )

  1. Attached is the updated .dtsi file ( chnages made from line 128 to 133 ).

  2. Entry of gpio is not being created in /sys/class/gpio. .
    Was expecting an entry to be created here by defalut.

  3. cat /sys/kernel/debug/pinctrl/20e0000.iomuxc/pinmux-pins
    Returns (MX6Q_PAD_RESERVE15) (MUX_UNCLAIMED ) (GPIO_UNCLAIMED)

Was expecting that it would show the driver name ( our custom ) here.

Could you please let me know what mistake am i doing or provide any inputs.

link text

A GPIO used by a driver for interrupt or otherwise does not get exposed in /sys/class/gpio. One possible example of how a GPIO is used as an interrupt in a driver can be seen in the Colibri VF50 touchscreen driver and it’s corresponding device tree entry here.

Ok Sanchayan ,

Thanks for valuable input , will check it.
( REQUEST : - If you can please provide inputs for below mentioned points , i can plan my test case tomorrow & hence start early )

w.r.t standard dtsi file supplied with the board :-
a) GPIO1, GPIO2, GPIO3, GPIO4 & GPIO 8 is being created on /sys/class/gpio ** but GPIO5 , GPIO6 , GPIO7 is not created ?**
(I am referring IXORA datasheet X27 details page 28 )

b) I tested by removing all entries of gpio pinmux from dtsi , but still entries are created under /sys folder ?

c) Under which case will we get (MX6Q_PAD_RESERVE15) (MUX_UNCLAIMED ) (GPIO_UNCLAIMED) message from kernel ?

I will proceed with the pointer provided by you , will share the outcome.

GPIO1, GPIO2, GPIO3, GPIO4 & GPIO 8 is being created on /sys/class/gpio but GPIO5 , GPIO6 , GPIO7 is not created ? (I am referring IXORA datasheet X27 details page 28 )

See the comment here.

I tested by removing all entries of gpio pinmux from dtsi , but still entries are created under /sys folder ?

Which exact entries under /sys you refer?

Under which case will we get (MX6Q_PAD_RESERVE15) (MUX_UNCLAIMED ) (GPIO_UNCLAIMED) message from kernel ?

They seem to originate from the pinctrl drivers here and here.

Dear Sanchayan ,
Thanks for the pointers .
I was able to toggle the GPIO2 with help of your pointers above.
I have not understood 100% of details but sufficient enough to get the work done as required.
( I an still going through the links for better understanding of finer details )

I thank you for sharing helpful file’s & your effort to reply on a long support thread like this.
Extremely thankful …