Hardware Design Queries for Custom Carrier Board with Verdin iMX8M Plus Quad SoM

Technical Support
1

Greetings!

We are planning to design a custom carrier board based on the Verdin iMX8M Plus Quad System on Module (SoM) for our new product development (NPD). We have the following hardware design queries related to the Verdin iMX8M Plus Quad SoM:

As part of this integration, we require a few interrupt pins to be used alongside the QSPI interface:

  1. Are there any dedicated interrupt pins that can be mapped to the QSPI controller on the Verdin iMX8M Plus SBC?

  2. Which pins on the Verdin iMX8M Plus SBC edge connector are available and suitable for use with the QSPI interface?

Additionally, could you please confirm the recommended voltage levels (VOL, VIL, VOH, VIH) that should be maintained at the SoM interfacing connector?

Finally, we request you to share the schematics for the Verdin iMX8M Plus Quad SoM to assist us in designing the custom carrier board.

We look forward to your guidance on these points.

2

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Verdin iMX8M Plus Custom Carrier Board Design

QSPI Interface and Interrupt Configuration

Based on the Verdin iMX8M Plus V1.1 datasheet, the i.MX 8M Plus features a Flexible SPI Controller (FlexSPI) with up to two SPI channels (1)(2). However, only one channel is available on the module edge connector pins (1)(2). The controller supports single, dual, quad, and octal mode data transfer (1)(2). Since the second SPI channel is not available, the octal mode cannot be used (1)(2).

The Verdin standard offers one QuadSPI channel with two chip selects for up to two memory devices in the “Reserved” pin class (1)(2). However, only the first chip select pin is available from the FlexSPI controller (1)(2). The second chip select pin on the module edge connector is a regular GPIO (1)(2). Therefore, the support for dual device memory is limited (1)(2).

Available GPIO Pins for Interrupts

For interrupt pins alongside the QSPI interface, you can utilize the dedicated camera GPIO signals that are available on the Verdin iMX8M Plus (3):

  • Pin 216: GPIO_5_CSI (GPIO1_IO7) - Dedicated camera GPIO signal (3)
  • Pin 218: GPIO_6_CSI (GPIO1_IO8) - Dedicated camera GPIO signal (3)
  • Pin 220: GPIO_7_CSI (GPIO4_IO3) - Dedicated camera GPIO signal (3)
  • Pin 222: GPIO_8_CSI (GPIO4_IO1) - Dedicated camera GPIO signal (3)

These GPIO pins can be configured as interrupt inputs for your QSPI interface implementation.

Design Resources and Documentation

Datasheets

The most current datasheet available is the Verdin iMX8M Plus V1.1 datasheet (1). This contains the complete interface descriptions and pin mappings you’ll need for your custom carrier board design.

Carrier Board Design Resources

For designing your custom carrier board, Toradex provides comprehensive design resources (4):

  • Carrier Board Design Section with free reference designs, schematics, 3D designs and tools (4)
  • Verdin Family Specification documentation (4)
  • Toradex Pinout Designer tool (4)

3D Models

Toradex provides both generic and specific 3D mechanical models (4):

  • Generic Verdin 3D Mechanical Models: Contains maximum component height for testing mechanical fit (4)
  • Specific Verdin iMX8M Plus 3D Models: Simplified models containing only PCB and CPU for heat spreader/heat sink designs (4)

Available formats include SolidWorks CAD models, 3D STEP models, and 3D PDF models (4).

Hardware Specifications and Voltage Levels

For detailed electrical specifications including voltage levels (VOL, VIL, VOH, VIH), you’ll need to refer to the complete Verdin iMX8M Plus V1.1 datasheet (1) and the Verdin Family Specification (4). These documents contain the comprehensive electrical characteristics and interface specifications required for your carrier board design.

The interface can be used for accessing NAND and NOR flashes over the QuadSPI standard, and can also be used for interfacing HyperBus and FPGA devices (1)(2).

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4

Most of the SoM X1 connector pins are directly routed to the i.MX8X Plus SoC. Therefore, the recommended voltage levels (VOL, VIL, VOH, VIH) can be found in the SoC datasheet.

The QSPI controller is integrated into the i.MX8X Plus SoC, so you can use any of its pins capable of generating an interrupt. The mapping between the SoM connector and the SoC balls is provided in Table 12: X1 Connector of the SoM datasheet. The QSPI pins are also listed there:

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Unfortunately, the SoM schematic is proprietary and cannot be shared. However, we can provide detailed information about the specific SoM part upon your request.