Why doesn’t the GPIO Config Utility 2.4 allow me to change the boot-up configuration on my Apalis T30? Is there some other way to accomplish this?
This feature is currently not supported (see also roadmap issue 7823).
You have currently two options as long as this feature is not implemented:
- You configure the GPIOs accordingly in after the images has bootet using the GPIOLib in your application.
- You can use the hardware patch feature that directly writes to the hardware registers. This is currently not documented:
Here some more details about how to configure this in the bootloader:
In image 1.4 we introduced a patch configuration in the config block.
- patch.addrX Address you want to patch
- patch.maskX Patch Mask
- patch.valX Value which should be written to address using the mask
X is in a range from 0 to 16.
A small example how to configure these registsers for Colibri / Apalis T30:
Configuring the hardware registers needs some background knowledge you get form the TRM from Nvidia. You need to check at two locations: GPIO Registers (Chapter 14.2 of TRM) as well as the Pinmuxing (Chapter 8.5 or TRM).
A small example for SODIMM Pin 45 (Alpanumiric V1, see also alphanumeric mapping table):
// First set pin to input and GPIO set patch.addr0 = 0x6000D504 set patch.val0 = 0x2 set patch.mask0= 0x2 // Second, de-tristate pins set patch.addr1 = 0x70003044 set patch.val1 = 0x00 set patch.mask1 = 0x10 save patch
Thanks Samuel. I hope you can implement the feature soon, but in the meantime I will use your suggestions.
Is there a mistake on line 2 for the addr0 value?
SODIMM Pin 45 is under Controller GPIO6, Port V, so Port Offset is 0x284, then going to the next table, the Register offset for Port V is 0x284. So wouldn’t line 2 be
set patch.addr0 = 0x6000D508
@Ramza: I did not mention in the answer, that the example is for Colibri / Apalis T30 and not T30. There the example is correct. Note: You do not need to multiply the offsets by 2.