Enable more UARTs

Technical Support
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1

I’m trying to enable two more UARTs on the Colibri iMX7. I’ve read the Device Tree customization article and edited the file imx7-colibri-eval-v3.dtsi to include

&uart4 {
	status = "okay";
};

&uart6 {
	status = "okay";
};

and then, added the code below to the file imx7-colibri.dtsi

	pinctrl_uart4: uart4-grp {
		fsl,pins = <
			MX7D_PAD_I2C2_SCL__ECSPI3_SCLK		0x2 /* SODIMM 88 */
			MX7D_PAD_I2C2_SDA__GPIO4_IO11		0x14 /* SODIMM 86 */

		>;
	};

	pinctrl_uart6: uart6-grp {
		fsl,pins = <
			MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16	0x14 /* SODIMM 101 */
			MX7D_PAD_ECSPI1_MOSI__GPIO4_IO17	0x14 /* SODIMM 103 */
		>;
	};

The .dtb file is generated after compiling. After changing the device tree file in the module, I can see two more serial interfaces under /dev/tty*

root@colibri-imx7:~# ls /dev/ttymxc*
/dev/ttymxc0  /dev/ttymxc1  /dev/ttymxc2  /dev/ttymxc3  /dev/ttymxc5

But when I try to echo some message to ttymx3 or ttymxc5, nothing happens, it looks like the pins aren’t working as RX and TX, for both UARTs. It works fine for the other interfaces (mxc0, mxc1 and mxc2), which are enabled by default. I’m no expert in Linux, just tried to follow the guides, but I’m having trouble with this. Any help is appreciated

2

You should also disable the whole “original” interface related to that pins, or remove required pins from it.
For example:
iMX 7 UART4 TX/RX pins shared with ecspi3.SS0/ecspi3.SCLK
So you can disable ecspi3 by changing its status to “disabled”

@imx7-colibri-eval-v3.dtsi

&ecspi3 {
-	status = "okay";
+    status = "disabled"

	mcp2515: can@0 {
		compatible = "microchip,mcp2515";

Or you can do

           @imx7-colibri-eval-v3.dtsi
            	pinctrl_ecspi3_cs: ecspi3-cs-grp {
            		fsl,pins = < 
 -		MX7D_PAD_I2C2_SDA__GPIO4_IO11		0x14   //SODIMM 86
            		>;
            	};
            
            	pinctrl_ecspi3: ecspi3-grp {
            		fsl,pins = <
            			MX7D_PAD_I2C1_SCL__ECSPI3_MISO		0x2
            			MX7D_PAD_I2C1_SDA__ECSPI3_MOSI		0x2
  -                     MX7D_PAD_I2C2_SCL__ECSPI3_SCLK		0x2 //SODIMM 88
            		>;
            	};

In last case it makes ecspi3 unusable, so it doesn’t have to much sense here. It better to disable the whole escpi3. However in other situations you can remove some pins from interface while keeping it functional.

3

Thanks for your answer, but I’m still having trouble with this. Did the modifications you’ve suggested, disabled ecspi3, but still I can’t send nor receive anything in those interfaces I’m trying to enable. I’ve also checked the file imx7-colibri.dtsi and I found the following code:

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1 &pinctrl_uart1_ctrl1 &pinctrl_uart1_ctrl2>;
	assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	uart-has-rtscts;
	fsl,dte-mode;
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2>;
	assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	uart-has-rtscts;
	fsl,dte-mode;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>;
	assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	fsl,dte-mode;
};

I wonder if I needed to create a similar structure for &uart4 and &uart6 in order to make it work. So I did, like that:

&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	fsl,dte-mode;
};

&uart6 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart6>;
	assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
	assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
	fsl,dte-mode;
};

I’ve also checked the file /proc/tty/driver/IMX-uart within Linux and it returned me this:

erinfo:1.0 driver revision:
0: uart:IMX mmio:0x30860000 irq:52 tx:33646 rx:753 RTS|DTR|DSR|CD
1: uart:IMX mmio:0x30890000 irq:53 tx:0 rx:0 DSR|CD
2: uart:IMX mmio:0x30880000 irq:54 tx:196 rx:156 DSR|CD
3: uart:IMX mmio:0x30A60000 irq:59 tx:159 rx:0 DSR|CD
5: uart:IMX mmio:0x30A80000 irq:60 tx:205 rx:0 DSR|CD

Which makes me think theat info is actually being transmitted, since there are some bytes in tx in both uart4 and uart6, but nothing received. And in the carried board the rx and tx pins for each uart are shorted, so that I can transmit and receive with the Colibri iMX7. This setup works for both uart2 and uart3, by the way, but not for uart4 and uart6. I’m feeling that this is a very simple thing to do, just enabling some mode UARTs, but I can’t find a way to actually do this.

4

You need to select the correct muxing option through the defines available for the pads. E.g. SODIMM 86 has pad name I2C2_SCL. You can search by PAD_I2C2_SCL in arch/arm/boot/dts/imx7d-pinfunc.h to find all its muxing options. Also I would use the pin configuration as we use on our regular UARTs: 0x79. See also the Pinmux iMX7 section of the Device Tree Customization article.

Given that you are using the UARTs in DTE mode too, your muxing should look like this:

 pinctrl_uart4: uart4-grp {
     fsl,pins = <
         MX7D_PAD_I2C2_SCL__UART4_DTE_TX        0x79 /* SODIMM 88 */
         MX7D_PAD_I2C2_SDA__UART4_DTE_RX        0x79 /* SODIMM 86 */

     >;
 };

 pinctrl_uart6: uart6-grp {
     fsl,pins = <
         MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX    0x79 /* SODIMM 101 */
         MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX    0x79 /* SODIMM 103 */
     >;
 };
5

Perfect. With this configuration, both UART4 and UART6 are working now. Thanks for your answers!