ELB-4005: Limit the Wi-Fi Module SDIO Clock to 25MHz


Description of ELB-4005 change to coming BSP 5.4.0 says “We got confirmation from NXP and AzureWave that 3.3V@50MHz is not recommended due to noise affecting the wireless throughput. Limit the SDIO Clock to 25MHz for 3.3V I/O signaling on Colibri iMX6ULL.”.

Just tried 25 MHz instead of 50 MHz expecting Wi-Fi throughput improvement. Top speed in STA mode instead of improving drops about 2 times. From about 80 Mbps to about 40 Mbps, both Rx and Tx. I’m testing using speedtest-cli for ARM.

With all my respect to NXP and AzureWave, since it is told that Wi-Fi throughput drops due to SDIO pins noise, I expected to see at least minimal effect changing SDIO pads settings in DT from default to weakest drive strength, as well changing slew rate from fast to slow. I think it should affect SDIO noise and, as description says, Wi-Fi throughput. I saw no change at all. Did someone at Toradex test this change before patching DT in kernel sources? Does anyone really benefits from this change? Perhaps there are some special conditions where this change really helps?

Looks like SDIO is bottleneck. Since it’s not easy to cross speed limits with 1.8V SDIO, perhaps it would be better to add 2 ports USB HUB to Colibri module. One port would serve Host feature to carrier board, another port for onSOM USB Wi-Fi module?


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Hello @Edward ,


After checking with our BSP team, I can confirm that we also did not see any performance improvements but we did it anyways as it was a recommendation from NXP that we should lower the SDIO clock rate.

Best regards,