Does WinCE 6 for VF61 use SPI1?

Technical Support
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#1

I’ve developed an application on M4 core of Colibri VF61 which uses SPI1 peripheral (SPI1_SCK, SPI1_SIN, SPI1_SOUT and SPI1_PCS0 pins).
The application runs fine when I load it to M4 core through Keil ULINK Pro debugger,
When I load and execute it from WinCE 6 (using rpmsg library), after a while SPI1_PCS0 is not asserted anymore.

Does WinCE 6 for VF61 somehow use SPI1 pins?
Does WinCE 6 for VF61 use SPI1_PCS0 pin for some purpose?

Thanks

#2

After a deeper investigation, I found that after a while, M4 core jumps into Hardware Fault Handler.
I suspect some conflict between how A5 and M4 want to configure registers.
Is there a way to debug this kind of problems?

#4

WinCE does not use any of the SPI1 pins if you are not using our SPI library.

#5

Hello @luka.tx
I investigated, and I’m sure M4 jumps into Hard Fault when the application is loaded from A5.
The same application works perfectly when it’s loaded into M4 using Keil debugger.
I suspect some issues while setting clocks or DMA; but I used DMA1 only, based on your suggestion.

Do you have any experience in this kind of issues?

#6

No sorry. But you could try disabling AC97 and DMA drivers inside WinCE. Or maybe try some other drivers.

#7

Thanks @luka.tx.
I’m not an expert of WinCE. How can I disable these drivers in WinCE?

#8

Go to the registry under
HKLM\Drivers\BuiltIn\AC97 and rename DLL by adding “_” before value
Same for DMA.

Btw: what memory do you use with your DMA? Do you use DDR as target/source memory?

#9

Thank you.
Up to now on M4 side I use OCRAM only (for code and data) so I think I should not have problems.
Could you confirm that WinCE 6 on A5 doesn’t use OCRAM?

I’m going to open a new topic to get help on how to share DDR memory between M4 and A5 (I need it in the future).

#10

A5 only uses OCRAM during suspend sequence.

#11

And so, should I consider something before using OCRAM in M4 application?

#12

No. You could use OCRAM when ever you want.