Dear friends,
I developed and printed a custom board for Collibri VF61, I mainly used ideas from altium files provided for IRIS board.
But I added a second ethernet (KSZ8851) and a second CODEC (SGTL5000) to my custom board.
I used the provided dual-eth devicetree example to get the second ethernet available. I can see the fec0 and fec1 both in my system. (Now can only use fec0 but I think I will solve that problem soon)
My question is :
For using the SGTL via SAI3/I2C2 my chematic is as attached file. Now I need an extension on my DEVICETREE. Could you please provide me information on how can I prepare the devicetree. A ready made devicetree will be very very very very helpful. (P.S. : I already added the SGTL5000 to my kernel)
A brief summary of the picture is as follows :
X1 Pin ----------CPU Port Name----------Alternate Function Name ----------SGTL5000PIN_Name
====----------============ ----------===============----------=============
65-----------PTB18----------EXT_AUDIO_MCLK----------SYS_MCLK(13)
192----------PTA26----------SAI3_TX_BCLK---------- I2S_SCLK(15)
29----------PTA31----------SAI3_TX_SYNC----------I2S_LRCLK(14)
53----------PTA29----------SAI3_TX_DATA----------I2S_DIN(17)
51----------PTA28----------SAI3_RX_DATA----------I2S_DOUT(16)
104----------PTD28----------I2C2_SCL----------CTRL_CLK(19)
107----------PTD27----------I2C2_SDA ---------- CTRL_DATA(18)
Thanks
Baris DINC
Onur Engineering
