Please see attached table, especially pins 13 thru 20 on the Iris X16 connector for gpio.
The highlighted pins give an error when I try to export them. What am I missing?
I don’t see any conflicts on those pins 14 and 20 (SODIMM 133,45) when I load the Iris + T30 configuration on the Toradex Pinout Designer.
Pin 18 (SODIMM_85) which maps to GPIO_PV3 (GPIO-V.03) or user-space gpio 171 is exported on boot. Wondering why? Is this intended for a specific function?
I don’t see any conflicts on those pins 14 and 20 (SODIMM 133,45) when I load the Iris + T30 configuration on the Toradex Pinout Designer.
SODIMM_45 is the standard GPIO wakeup source. Have a look at this.
SODIMM_133 is configured as KEY_HOME by default, have a look at this.
Pin 18 (SODIMM_85) which maps to GPIO_PV3 (GPIO-V.03) or user-space gpio 171 is exported on boot. Wondering why? Is this intended for a specific function?
It is configured as GPIO in board file, thats the reason its by default exported in ‘sys/class/gpio’, have a look at this.