Colibri T30 (linux) not outputting 24 bit video on RGB interface

We’re using the Colibri T30 in a custom carrier board - the parallel video interface is passed to an FPGA for video distribution. A client recently noticed that we are not getting full 24 bit video, but rather 18 bit. We did have to troubleshoot this during development a couple of years ago, but I can’t recall how we got it to work or know why it no longer does. Our u-boot kernel framebuffer arguments are set to 1024x768-24 at 75Hz and our Xorg.conf file is also set to 24 bit depth, but the two least significant bits on each color channel are not working.

Any ideas? OS build is V2.6.

Please note that the default frame buffer colour depth is 16 bpp and the default display interface on Colibri is 18-bit. Have a look at the answer to the following question how you may go about configuring this for 24-bit RGB.

I’ve looked at that very answer a few times in the past week trying to debug this issue. As far as I can tell both our xorg.conf and framebuffer configuration are fine, the problem seems to be with pin muxing the output signals for 24bit depth video from the colbri. Using your gpio config tool we have verified that our baseboard / test equipment are looking at the correct signals (LCD_D18 to LCD_D23) which we can manually configure as GPIOs and toggle.

However, both the T30 datasheet and the gpio config tool show the primary functions of these signals as LCD0-HP1, LCD0-HP2, LCD0-VP1, LCD0-HP0, LCD0-DI, and LCD0-PP respectively. Your comment in the page https://developer.toradex.com/knowledge-base/display-output-resolution-and-timings-linux#Tegra_Framebuffer_Boot_Configuration mentions that “this has nothing to do with how any of this ends up on the actual external display interface signals which is rather a pin muxing thematic. The Tegras are hard coded in their resp. board pinmux files for 24 bit parallel RGB interfaces.”

If I look at /sys/kernel/debug/tegra_pinmux signals LCD_D0 thru D17 are configured as “TEGRA_MUX_DISPLAYA” whereas D18 through D23 are “TEGRA_MUX_RSVD3”. Do I need to recompile the kernel to enable these signals for 24 bit color?

Yes, all Colibri modules by default have only a 18-bit display interface. Upping that to a 24-bit interface may be possible using alternate functions of other pins but is non-standard and requires pin muxing changes.

custom carrier board

As the 24-bit display interface is not as per Colibri Standard. What exact pins did you use for this?

A client recently noticed that we are not getting full 24 bit video, but rather 18 bit.

How exactly did he determine this?

Our u-boot kernel framebuffer arguments are set to 1024x768-24 at 75Hz

And what is the fbset output?

and our Xorg.conf file is also set to 24 bit depth,

What does /var/log/Xorg.0.log say?

but the two least significant bits on each color channel are not working.

How exactly did you determine this?

OS build is V2.6

What exact versions of things are you talking about?

However, both the T30 datasheet and the gpio config tool show the primary functions of these signals as LCD0-HP1, LCD0-HP2, LCD0-VP1, LCD0-HP0, LCD0-DI, and LCD0-PP respectively.

I believe this naming is as per NVIDIA’s datasheet.

If I look at /sys/kernel/debug/tegra_pinmux signals LCD_D0 thru D17 are configured as “TEGRA_MUX_DISPLAYA” whereas D18 through D23 are “TEGRA_MUX_RSVD3”.

Where/how exactly did you come to this conclusion?

I do get a different result:

root@colibri-t30:~# cat /sys/kernel/debug/tegra_pinmux | grep -E 'LCD_D18|LCD_D19|LCD_D20|LCD_D21|LCD_D22|LCD_D23'
        {TEGRA_PINGROUP_LCD_D18,         TEGRA_MUX_DISPLAYA,      TEGRA_PIN_INPUT,  TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_LCD_D19,         TEGRA_MUX_DISPLAYA,      TEGRA_PIN_INPUT,  TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_LCD_D20,         TEGRA_MUX_DISPLAYA,      TEGRA_PIN_INPUT,  TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_LCD_D21,         TEGRA_MUX_DISPLAYA,      TEGRA_PIN_INPUT,  TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_LCD_D22,         TEGRA_MUX_DISPLAYA,      TEGRA_PIN_INPUT,  TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
        {TEGRA_PINGROUP_LCD_D23,         TEGRA_MUX_DISPLAYA,      TEGRA_PIN_INPUT,  TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},

BTW: This is with stock BSP V2.6b2 released 2016-07-01.

Do I need to recompile the kernel to enable these signals for 24 bit color?

No, it turns out despite a 24-bit display interface not being Colibri Standard, those pins should already be muxed as such both on Colibri T20 as well as Colibri T30.

However what you may be missing is the depth setting within the struct tegra_dc_out colibri_t30_disp1_out. E.g. on Apalis T30 where a 24-bit display interface is indeed the default this is set to 24.