Can't wake up after suspend on I.MX8QM

Technical Support
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1

I’m trying to test the suspend/resume on my Apalis I.MX8QuadMax. The suspend appears to work, but I can’t get it to resume. I tried both of these methods:

Try to wake up using debug UART (which is DMA_LPUART1):
echo enabled > /sys/class/tty/ttyLP1/power/wakeup; (I confirmed this is DMA_LPUART1)
echo mem > /sys/power/state

Try to wake up with the RTC:
echo +5 > /sys/class/rtc/rtc0/wakealarm;
echo mem > /sys/power/state

I referenced this page, though there isn’t a specific section for the I.MX8QuadMax:
Suspend/Resume (Linux) | Toradex Developer Center

2

What exact hardware (module and carrier board) and software versions of things are you talking about?

3

The SOM is an Apalis IiMX8 with NXP i.MX8QuadMax (MIMX8QM6AVUFFAB). I have a custom carrier board that is modeled off of the Apalis Evaluation board. My software is the yocto linux BSP.

SOM:

Evaluation board:

4

Hi @dlm080

Thanks for this information.
Could you describe the exact version of the hardware and software ( uname -a ) of the SoM?

Best regards,
Jaski

5

Linux apalis-vhu2 5.4.91-0+git.c59b3c2da1e9 #1 SMP PREEMPT Thu Jun 10 01:09:18 UTC 2021 aarch64 aarch64 aarch64 GNU/Linux

6

My problem seems related to my current setup (custom board or software). I went back to a toradex evaluation board setup I had with an old version of my software, and both the console wakeup as well as the RTC wakeup work.

7

It looks like a device tree change was the cause of my problem. I had removed this clock “pcie_sata_refclk_gate” from the pciea instance below, and for some reason that breaks the resume feature. Maybe that clock is required in suspend mode.

/* Apalis PCIE1 pcie@0x5f000000 */
&pciea {
pinctrl-names = “default”;
pinctrl-0 = <&pinctrl_reset_moci>;
clocks = <&pciea_lpcg 0>,
<&pciea_lpcg 1>,
<&pciea_lpcg 2>,
<&phyx2_lpcg 0>,
<&phyx2_crr0_lpcg 0>,
<&pciea_crr2_lpcg 0>,
<&misc_crr5_lpcg 0>,
<&pcie_sata_refclk_gate>;

clock-names = “pcie”, “pcie_bus”, “pcie_inbound_axi”,
“pcie_phy”, “phy_per”, “pcie_per”, “misc_per”,
“pcie_ext”;

ext_osc = <1>;
fsl,max-link-speed = <1>;
reset-gpio = <&lsio_gpio0 30 GPIO_ACTIVE_LOW>;
vpcie-supply = <®_pcie_switch>;
};

pcie_sata_refclk_gate: sata-ref-clock {
compatible = “gpio-gate-clock”;
pinctrl-names = “default”;
pinctrl-0 = <&pinctrl_pcie_sata_refclk>;
#clock-cells = <0>;
clocks = <&pcie_sata_refclk>;
enable-gpios = <&lsio_gpio4 11 GPIO_ACTIVE_HIGH>;
};