Hi. We have an application where we are using ecspi3 and ecspi1 on the i.MX7 512M. We are trying to set up an i.MX7 1G in the same application. Using the same devicetree configuration we can’t enable ecspi1. I confirmed that the SPI pins are not being used in another pinctrl group. Listed below are the devicetree entries that work for the 512M but not the 1G:
&ecspi1 {
status = "okay";
spidev1: spidev@1 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <23000000>;
status = "okay";
};
};
&ecspi3 {
status = "okay";
mcp2515: can@0 {
compatible = "microchip,mcp2515";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can_int>;
reg = <0>;
clocks = <&clk16m>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
spi-max-frequency = <10000000>;
status = "disabled";
};
spidev0: spidev@0 {
compatible = "toradex,evalspi";
reg = <0>;
spi-max-frequency = <23000000>;
status = "okay";
};
};
&ecspi1 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_ecspi1_cs>;
};
&ecspi3 {
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs>;
};
pinctrl_ecspi1_cs: ecspi1_cs_grp {
fsl,pins = <
MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x14
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x2
MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x2
MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x2
>;
};
pinctrl_ecspi3_cs: ecspi3_cs_grp {
fsl,pins = <
MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14
>;
};
pinctrl_ecspi3: ecspi3grp {
fsl,pins = <
MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2
MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2
MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2
>;
};
Thank you.