Aquila AM69 Octa 32GB WB IT V1.0A SOM using C01 pin as gpio

rkennedy-bia5 · March 19, 2026, 7:28am

I am trying to use a WKUP_GPIO pin on the Aquila AM69 Octa 32GB WB IT V1.0A SOM (C01) which is mapped through to WKUP_GPIO0_49 on the TI AM69A SoC.

We have developed a carrier board for the SOM based on the Toradex Aquila Development board layout and configuration. The loaded dts when uboot starts up is k3-am69-aquila-v1.0-dev.dts

This is the fragment I am setting up in our custom overlay to assign the mode 7 to the pin:

/* --- RFM_RST pad mux lives in pinctrl@4301c038 --- */
	fragment@301 {
		target-path = "/bus@100000/bus@28380000/pinctrl@4301c038";
		__overlay__ {
			bia5_rfm_rst_pins: bia5-rfm-rst-pins {
				pinctrl-single,pins = <
					/* WKUP_GPIO0_32 -> offset 0x000c */
					J784S4_WKUP_IOPAD(0x000c, PIN_OUTPUT, 7)
				>;
			};
		};
	};

this should show up as gpio chip 1 line 32 when my linux software open the connection to the gpio line.

when I measure the voltage at the SOM pin C01, I am not getting a logic 1.8V level change when setting my gpio assigned reset line high.

My next step is to try and hardwire an unassigned pin like D01 (currently ADC) to a gpio and try that.

My question is, are there any problems with using C01 in linux from the WKUP_GPIO (gpio chip 1) that I have missed?

ToradexAI · March 19, 2026, 7:29am

Hi, I’m the Toradex AI Assistant.

I might make mistakes or occasionally get you wrong. Our support team will step in if needed.

To guide you properly with your WKUP_GPIO configuration on the Aquila AM69, could you specify which OS and version you are running? This will help me provide the most accurate guidance for your device tree overlay configuration.

You can get this information by running the tdx-info command on your device. You can find more details about this tool at https://developer.toradex.com/software/development-resources/tdx-info/.

Common platforms include:

Hardware: Aquila AM69, Verdin i.MX8M Plus, Verdin AM62, Apalis i.MX8QP, Colibri i.MX8X
Operating System: Torizon OS 6, Torizon OS 7.2.0-build.13, Yocto BSP 7, BSP 6
Integration: Device tree overlays, GPIO configuration, pin multiplexing

Once I know your specific platform details, I can provide targeted guidance for configuring your WKUP_GPIO0_49 pin correctly.

Best regards, Toradex AI Assistant.

Did you like my answer?

If I answered your question, please tick the “Solution” checkbox.

For follow-up questions to me, please use @ToradexAI in your post.

rkennedy-bia5 · March 19, 2026, 10:46pm

Software summary

Bootloader: U-Boot

Kernel version: 6.6.119-7.5.0-devel #1 SMP PREEMPT Fri Dec 12 14:50:07 UTC 2025
Kernel command line: root=PARTUUID=ea84b3dc-02 ro rootwait console=tty1 console=ttyS2,115200
Distro name: NAME=“TDX Wayland with XWayland”
Distro version: VERSION_ID=7.5.0-devel-20260205045228-build.0
Distro variant: -
Hostname: aquila-am69-12594167

Hardware info

HW model: Toradex Aquila AM69 V1.0 on Aquila Development Board

Toradex version: 0088 V1.0A
Serial number: 12594167
Processor arch: aarch64

U-Boot version: 2024.04-ti-g9b64e97eb414
U-Boot vendor: toradex
U-Boot board: aquila-am69
U-Boot fdt_board: dev
U-Boot soc: k3

Device tree enabled: k3-am69-aquila-v1.0-dev.dtb

Overlays enabled: fdt_overlays=k3-j784s4-am69-aquila-rvh-overlay.dtbo

this is our custom overlay to enable devices on our mainboard that mostly follows the Aquila Development board except for quad phy and GPIOs.

ToradexAI · March 19, 2026, 10:47pm

Based on your system information, you’re running TDX Wayland with XWayland version 7.5.0-devel on an Aquila AM69 V1.0. Let me help you troubleshoot the WKUP_GPIO0_49 configuration issue.

Analysis of Your Device Tree Overlay

Your overlay fragment looks correct in structure, but there are a few potential issues to check:

1. Pin Configuration Verification

First, verify that you’re using the correct offset and GPIO mapping for pin C01 (WKUP_GPIO0_49). The offset 0x000c should correspond to WKUP_GPIO0_49, but you should double-check this against the AM69A technical reference manual(1).

2. GPIO Controller Assignment

You mentioned expecting this to show up as “gpio chip 1 line 32”, but there might be a mismatch. WKUP_GPIO0_49 should typically appear as line 49 on the WKUP GPIO controller. You can verify the actual GPIO mapping using:

gpiodetect
gpioinfo

These commands will show you the available GPIO chips and their line assignments(2).

3. Pin Control Group Activation

Your overlay defines the pin control group but doesn’t assign it to a GPIO controller. You need to add a fragment to assign this pin group to the appropriate GPIO controller(1):

fragment@302 {
    target-path = "/bus@100000/bus@28380000/gpio@42110000";
    __overlay__ {
        pinctrl-names = "default";
        pinctrl-0 = <&bia5_rfm_rst_pins>;
    };
};

4. Pin Conflict Resolution

Ensure that no other peripheral is using pin C01. You may need to disable any conflicting interfaces in your overlay(1).

Debugging Steps

Check GPIO availability:

gpioinfo | grep -i wkup

Verify pin control assignment:

cat /sys/kernel/debug/pinctrl/4301c038.pinctrl/pinmux-pins

Test GPIO control:

gpioset -c [chip_number] [line_number]=1
gpioget -c [chip_number] [line_number]

Alternative Approach

If C01 continues to have issues, your plan to test with D01 (ADC pin) is good. For D01, you would need to:

Disable the ADC functionality for that pin
Configure it as GPIO using the appropriate pin control settings
Assign it to the correct GPIO controller

The key is ensuring the complete chain: pin mux configuration → GPIO controller assignment → proper line mapping.

Best regards, Toradex AI Assistant.

Did you like my answer?

If I answered your question, please tick the “Solution” checkbox.

For follow-up questions to me, please use @ToradexAI in your post.

rkennedy-bia5 · March 19, 2026, 11:19pm

my apologies, it was supposed to say WKUP_GPIO0_32 (MCU_OSPI1_LBCLKO)

gpioinfo shows the following for gpiochip1:

gpiochip1 - 89 lines:
line 0: unnamed input
line 1: unnamed input
line 2: unnamed input
line 3: “AQUILA_C53” input
line 4: “AQUILA_B55” input
line 5: “AQUILA_B56” input
line 6: “AQUILA_B32” input
line 7: “AQUILA_B34” input
line 8: “AQUILA_C17” input
line 9: “AQUILA_C16” input
line 10: “AQUILA_D22” input
line 11: unnamed input
line 12: unnamed input
line 13: unnamed input
line 14: unnamed input
line 15: unnamed input
line 16: “AQUILA_B65” input
line 17: “AQUILA_C20” input
line 18: “AQUILA_B63” input
line 19: “AQUILA_B68” input
line 20: “AQUILA_B67” input
line 21: “AQUILA_B61” input
line 22: “AQUILA_B60” input
line 23: “AQUILA_B70” input
line 24: “AQUILA_B71” input
line 25: “AQUILA_B72” input
line 26: “AQUILC_B73” input
line 27: “AQUILA_B66” input
line 28: “AQUILA_B62” input
line 29: “AQUILA_C21” input
line 30: “AQUILA_C22” input
line 31: “AQUILA_C23” input
line 32: “AQUILA_C01” input

this is the overlay fragments for GPIO RFM_IRQ and RFM_RST

/* ============================================================
 * RFM95W WKUP GPIO pad config:
 *  - RFM_IRQ: WKUP_GPIO0_49  (offset 0x0000) -> input + pull-up
 *  - RFM_RST: WKUP_GPIO0_32  (offset 0x000c) -> GPIO output
 * ============================================================ */

/* --- RFM_IRQ pad mux/pullup lives in pinctrl@4301c190 --- */
fragment@300 {
	target-path = "/bus@100000/bus@28380000/pinctrl@4301c190";
	__overlay__ {
		bia5_rfm_irq_pins: bia5-rfm-irq-pins {
			pinctrl-single,pins = <
				/* WKUP_GPIO0_49 -> offset 0x0000 */
				J784S4_WKUP_IOPAD(0x0000, PIN_INPUT_PULLUP, 7)
			>;
		};
	};
};

 --- RFM_RST pad mux lives in pinctrl@4301c038 ---          
 fragment@301 {                                             
 target-path = "/bus@100000/bus@28380000/pinctrl@4301c038"; 
	 __overlay__ {                                            
 		bia5_rfm_rst_pins: bia5-rfm-rst-pins {                
			pinctrl-single,pins = <                           
                WKUP_GPIO0_32 -> offset 0x000c                
				J784S4_WKUP_IOPAD(0x000c, PIN_OUTPUT, 7)      
			    >;                                            
		};                                                    
	 };                                                       
 };                                                         

/* --- Apply pinctrl groups --- */
fragment@302 {
	target = <&wkup_gpio0>;
	__overlay__ {
		pinctrl-names = "default";
		pinctrl-0 = <&bia5_rfm_irq_pins &bia5-rfm-rst-pins>;
	};
};

};

benjamin.tx · March 20, 2026, 5:40am

Hi @rkennedy-bia5 ,
The pin has to be first assigned to GPIO function. It is mode 7 for WKUP_GPIO0_32, a.k.a AQUILA_C01. You have configured it in your device tree overlays.

 fragment@301 {                                             
 target-path = "/bus@100000/bus@28380000/pinctrl@4301c038"; 
	 __overlay__ {                                            
 		bia5_rfm_rst_pins: bia5-rfm-rst-pins {                
			pinctrl-single,pins = <                           
                WKUP_GPIO0_32 -> offset 0x000c                
				J784S4_WKUP_IOPAD(0x000c, PIN_OUTPUT, 7)      
			    >;                                            
		};                                                    
	 };                                                       
 };

The bia5_rfm_rst_pins needs to be referenced before taking effect. For example, adding <&bia5_rfm_rst_pins> to wkup_gpio0 node from arch/arm64/boot/dts/ti/k3-am69-aquila-dev.dts.

&wkup_gpio0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_gpio_04>,       /* Aquila GPIO_04 */
		    <&pinctrl_gpio_05>,       /* Aquila GPIO_05 */
		    <&pinctrl_gpio_06>,       /* Aquila GPIO_06 */
		    <&pinctrl_gpio_07>,       /* Aquila GPIO_07 */
		    <&pinctrl_gpio_08>,       /* Aquila GPIO_08 */
		    <&bia5_rfm_rst_pins>; /* Aquila C1 */
};

AQUILA_C1 can be toggled by gpioset -c 1 32=1 and gpioset -c 1 32=0.