Apalis iMX6 LVDS Configuration

marcel.tx · May 15, 2018, 10:15pm

Yes, I’ve asked them via email.The answer is as follows.

Our 12.3” product has no Back Porch and no Front Porch.

Meaning they really do not accept any? The datasheet we got from you suggests otherwise.

The reason is that the Timing Controller in our panel is not using H-sync and V-sync and Back and Front Porch just describe the timing between data and H-Sync and V-Sync.

Yes, but any sane panel will just ignore any such rather than failing. Or is it such an insane panel we fear it is? Then you are basically screwed.

In case of AA123AD11 only DENA is used for synchronization (horizontally and vertically).

What exactly do they mean by this? Usually DENA is used to gate valid pixel data for every line. No less and no more. What exactly do they expect their DENA to be doing?

Below is a shortcut of datasheet of AA121AD11 page 26/27. There is no more timing information available and needed.

But why exactly is it still not working? How about the encoding of pixel data which their datasheet is very unclear about?

Two questions come to mind at this point. 1- Should we leave these values empty?

I tried this, but when I left it empty I got an error, but I’m not quite sure.

I don’t think this is possible.

2- Should these values be 0?

The manufacturer says the product has no Porch. In this case If 0 has a meaning, would it be correct to write 0 to these values?

I’m not even sure this is possible as usually those engines writing out pixel data have certain restrictions.

Thanks.

You are very welcome.

aktay · May 16, 2018, 5:37am

Dear Marcel, thank you so much.

What exactly do they mean by this? Usually DENA is used to gate valid pixel data for every line. No less and no more. What exactly do they expect their DENA to be doing?

We sent them the following screenshot as an example and we wanted they to give us a similar table.(Another LVDS display of the same company.)

We do not really know what we need to do right now. Is there anything I need to ask the manufacturer or demand them?

At this point, any information you give us, every advice is very important to us.

Thanks to everyone

jaski.tx · May 17, 2018, 9:36am

hi

Could you send us some pictures showing the back of the screen (connection to backlight) and connection to Ixora Board? Thanks.

aktay · May 21, 2018, 5:36am

Dear jaski,
I asked the related persons, but they said that the documents you requested are confidential. Can you give your mail address, I will send the documents.
Thanks.

jaski.tx · May 22, 2018, 6:30am

Hello, yeah, you can write at support@toradex.com. Thanks.

aktay · June 11, 2018, 10:54am

Dear Jaski,

I sent you the screen datasheet and Max told me to use the following settings for lvds. There are 2 questions I want to ask about this.

Are you sure these settings are the right settings for our screen?

As you know there is not enough information about lvds timing on screen datasheet, what should we do to calculate porch values,is there a formula etc?

lvds-channel@0 {
                      reg = <0>;
                      fsl,data-mapping = "spwg"; /* "jeida"; */
      +               fsl,data-width = <24>;
                      crtc = "ipu2-di1";
                      primary;
                      status = "okay";
       
                      display-timings {
      +                       native-mode = <&timing_wide>;
      +                       /* 12.3" WHD panel */
      +                       timing_wide: 1920x720-1ch {
      +                               clock-frequency = <85000000>;
      +                               hactive = <1920>;
      +                               vactive = <720>;
      +                               hback-porch = <45>;
      +                               hfront-porch = <44>;
      +                               vback-porch = <1>;
      +                               vfront-porch = <2>;
      +                               hsync-len = <1>;
      +                               vsync-len = <1>;
      +                               hsync-active = <0>;
      +                               vsync-active = <0>;
      +                               pixelclk-active = <0>;
      +                       };

jaski.tx · June 12, 2018, 12:42pm

hi @aktay

The settings are correct . The display has no back and front porch since it is not using any hsync and vsync. Only DataEN is important. For the calculation, the sum of the sync, porch, active pixel time will give the timing for DENA.

Did you have time to check for the drop voltage issue on 3.3V power supply for the LCD?

aktay · June 12, 2018, 1:17pm

Dear @jaski.tx
Thank you for the answer. However, the following topics I am interested in;

Why do we use 85 MHz when writing clock frequency 89 MHz on the datasheet?
hback-porch = 45 and hfront-porch = 44 How did you find this values?

For the calculation, the sum of the sync, porch, active pixel time will give the timing for DENA.

We know that the sum of these values gives the answer, but we can not find the values to calculate it on the datasheet.

The answer to your question is as follows.

We have measured the proposed pin(LVDS1_3.3V_SW, pin no: 32) on the connector(IXORA LVDS Connector X19). As a result, voltage level is 3.3V in case of the screen is not connected. But, in case of we connected the screen, voltage decreased around 2.6V. We don’t understand what the problem is.

Thanks

jaski.tx · June 12, 2018, 2:56pm

dear @aktay

We use 85MHz, since this is the limitation of the Soc Imx6. Anyway still with a lower frequency, there should be an image on the screen.
The sum of hback-porch = 45 and hfront-porch = 44 and hsync should be 90. This is written as blanking in the datasheet. We think, that the manufacturer switched the lines period vs blanking.

You should measure the 3.3V_SW at the L26 shown on page 14 of the schematic. The voltage decrease is very suspicious.

aktay · October 9, 2018, 5:46am

Hello @max.tx and @jaski.tx ,

We still couldn’t find a solution on this issue, but we recently informed that the datasheet that was presented to us was wrong.
Max previously told us to use the following settings according to the old datasheet. Do we need to modify the configuration according to the new datasheet?

New Datasheet

The configuration we are currently using.(Recommended by @max.tx )

         lvds-channel@0 {
                 reg = <0>;
                 fsl,data-mapping = "spwg"; /* "jeida"; */
                 fsl,data-width = <24>;
                 crtc = "ipu2-di1";
                 primary;
                 status = "okay";
  
                 display-timings {
                         native-mode = <&timing_wide>;
                         /* 12.3" WHD panel */
                         timing_wide: 1920x720-1ch {
                                 clock-frequency = <85000000>;
                                 hactive = <1920>;
                                 vactive = <720>;
                                 hback-porch = <45>;
                                 hfront-porch = <44>;
                                 vback-porch = <2>;
                                 vfront-porch = <1>;
                                 hsync-len = <1>;
                                 vsync-len = <1>;
                                 hsync-active = <0>;
                                 vsync-active = <0>;
                                 pixelclk-active = <0>;

jaski.tx · October 9, 2018, 6:15am

@aktay: Did you measure the 3.3V_SW?

aktay · October 9, 2018, 7:12am

@jaski.tx Yes we measured, Vcc: 3.3V

diego.tx · October 9, 2018, 12:48pm

Dear @aktay,
could you please confirm that you have still the voltage drop issue at pin 32 of the LVDS connector X19?

Could you please also measure the 3.3_SW voltage at pins 1 or 2 of the connector X14?

Thanks a lot for your help.

aktay · October 9, 2018, 1:56pm

Dear @diego.tx I asked the related teammates and they said the problem was solved. Should we change the lvds configuration according to the new datasheet?

jaski.tx · October 10, 2018, 7:24am

Good, thanks for this Information. These settings should work also with the new datasheet.
However you can try the following:
hsnyc+hfrontporch+hbackporch=minHBlanking= 64
The rest is the same.

lvds-channel@0 {
                  reg = <0>;
                  fsl,data-mapping = "spwg"; /* "jeida"; */
                  fsl,data-width = <24>;
                  crtc = "ipu2-di1";
                  primary;
                  status = "okay";
   
                  display-timings {
                          native-mode = <&timing_wide>;
                          /* 12.3" WHD panel */
                          timing_wide: 1920x720-1ch {
                                  clock-frequency = <85000000>;
                                  hactive = <1920>;
                                  vactive = <720>;
                                  hback-porch = <32>;
                                  hfront-porch = <31>;
                                  vback-porch = <2>;
                                  vfront-porch = <1>;
                                  hsync-len = <1>;
                                  vsync-len = <1>;
                                  hsync-active = <0>;
                                  vsync-active = <0>;
                                  pixelclk-active = <0>;
}

aktay · October 12, 2018, 6:01am

Hello @jaski.tx

We need to send LVDS signals after 3ms after VCC (3.3V) arrives to provide power ON / OFF sequence. You can see the screenshot. Do we need something like that and how do we do it?

jaski.tx · October 12, 2018, 2:13pm

We need to send LVDS signals after 3ms after VCC (3.3V) arrives to provide power ON / OFF sequence. You can see the screenshot. Do we need something like that and how do we do it?

Where you got this Information? Does the screen work now?