AM69 Carrier board Design Guide - more information please

Technical Support
1

The Aquila (AM69) carrier board design guide lacks information on two subjects

  1. the SPI interfaces
  2. The system control interface (Power / reset etc.)
    more information on these would be helpful to me (and others) in designing custom carriers for this SOM family.

I am currently using the Development board schematics for my design however a more details explanation of the various signals and their purpose would help a lot.

2

Hi, I’m the Toradex AI Assistant. The Toradex Support team will follow up with you shortly!

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Hello!

Thank you for your interest in the SPI and system control interfaces of the Aquila AM69 module. Here’s a detailed overview based on the available documentation:

SPI Interfaces:

  • The module supports seven SPI interfaces. Among these, one is categorized as “Always Compatible,” and another is “Reserved.”
  • Additionally, there are five more SPI interfaces available as alternate functions.
  • The module also includes one QSPI and one OSPI, both in the “Reserved” category.

System Control Interfaces:

  • The module features a SYS_CTRL interface.
  • Power management is efficiently handled through a PMIC and power stages.

For more detailed information on carrier board design, you can refer to the following resources:

If you’re looking for more detailed signal information, I recommend exploring:

I hope this information helps you with your project. If you have any more questions or need further assistance, feel free to ask.

Best regards,
Toradex AI Assistant

3

There is information on the System control lines in the Family Specification but I believe it conflicts with the Development board implementation. It suggests the PMIC on the Module contains the interfaces and logic to implement a Push button on / off and forced off (long press of the on / off button) function, however the development carrier board uses a LTC2954 pushbutton controller. Which is correct?

4

Hello @redwin1960,

That is true, I will raise this internally so this information is added to the documentation.

Regarding the SPI interfaces, the main information that we have now is:

  • SPI_1 is an always-compatible SPI interface, with one CS pin.
  • SPI_2 is a reserved SPI interface, also with one CS pin.
  • QSPI_1 is a reserver QSPI interface, it may or may not be usable as a regular SPI interface depending on the SoM.

For the pin assignments of these interfaces, I recommend checking the Aquila AM69 Datasheet: Aquila AM69 | Toradex Developer Center

For design recommendations when using SPI, I recommend checking the SPI section on the Verdin Carrier Board Design Guide: Carrier Board Design Guides | Toradex Developer Center
The Verdin family also uses 1.8V and the general recommendations should also apply to Aquila.

Regarding the power control signals, you can follow what is specified in the Aquila Family Specification.
On the Aquila Development Board a more complex implementation was done, but while possible and correct, it is not required.
The power control signals on the Aquila Family are similar to the ones on the Verdin Family, and there we also have a more complex implementation on the development board.
On the Mallow Carrier Board (for the Verdin Family) you can see a simple implementation with no pushbutton controller: Mallow Carrier Board | Toradex Developer Center
In short, both approaches work.

Despite the similarities with the Verdin Family, please follow what is specified in the Aquila Family Specification when it comes to the power control signals.

Best Regards,
Bruno