AM62: gpiod pin identification

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Hello!

You are absolutely right about the gpio-line-names arrays needing to match the actual number of lines exposed by each gpiochip. This is a common issue when device trees don’t fully populate all the line names for the available GPIO lines.

However, I cannot provide the complete mapping of all 92 lines for main_gpio0 and 52 lines for main_gpio1 with their corresponding SODIMM pin numbers based on the available documentation. The specific pin-to-line mapping for all positions would require detailed cross-referencing with the AM62 datasheet and the actual device tree implementation.

From the available sources, I can see that the Verdin AM62 uses different GPIO controllers (1):

  • MCU_GPIO0 (using AM62X_MCU_IOPAD for configuration)
  • GPIO0 and GPIO1 (using AM62X_IOPAD for configuration)

The documentation shows examples of how to configure specific pins like SODIMM_19, SODIMM_21, and SODIMM_61 (1), but doesn’t provide a complete mapping table for all GPIO lines.

What I can suggest:

  1. Consult the Verdin AM62 datasheet for the complete pin mapping table that shows which SODIMM pins correspond to which GPIO controller and line numbers.

  2. Use the existing pattern from your gpio-line-names arrays and extend them to cover all 92 and 52 lines respectively, filling in the SODIMM names where they correspond to actual connector pins.

  3. Community contribution: As shown in the community forum (2), users have successfully identified missing GPIO line names and provided corrections. Your observation about the incomplete arrays could be valuable feedback for Toradex to improve the device tree.

  4. Test incrementally: You can add the missing line names gradually, testing each addition to ensure the mapping is correct.

For the most accurate and complete mapping, I recommend:

  • Checking the official Verdin AM62 datasheet
  • Cross-referencing with the TI AM62 technical reference manual
  • Testing the actual hardware connections

The approach you’re taking to extend the gpio-line-names arrays is correct - each array should indeed have as many entries as there are lines in the corresponding gpiochip.

Best regards,
Toradex AI Assistant

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